Revert "remove fixedlogical.patch - added gprs to PowerParser p_atom_name"
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 7 Jun 2020 12:22:46 +0000 (13:22 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 7 Jun 2020 12:22:46 +0000 (13:22 +0100)
This reverts commit f61f93dcd82ef64a82fae8e2ee94987ba9794ce8.

src/soc/decoder/isa/fixedlogical.patch [new file with mode: 0644]
src/soc/decoder/pseudo/parser.py

diff --git a/src/soc/decoder/isa/fixedlogical.patch b/src/soc/decoder/isa/fixedlogical.patch
new file mode 100644 (file)
index 0000000..5733182
--- /dev/null
@@ -0,0 +1,20 @@
+--- fixedlogical.py.orig       2020-05-14 11:04:21.871367557 -0400
++++ fixedlogical.py    2020-05-14 11:04:28.714770484 -0400
+@@ -188,7 +188,7 @@
+         return (RA,)
+     @inject()
+-    def op_cmpb(self, RB, RA):
++    def op_cmpb(self, RB, RS, RA):
+         for n in range(0, 7 + 1):
+             if eq(RS[8 * n:8 * n + 7 + 1], RB[8 * n:8 * n + 7 + 1]):
+                 RA[8 * n:8 * n + 7 + 1] = concat(1, repeat=8)
+@@ -493,7 +493,7 @@
+                 form='X',
+                 asmregs=[['RA', 'RS'], '(Rc=1)'])
+     fixedlogical_instrs['cmpb'] = instruction_info(func=op_cmpb,
+-                read_regs=OrderedSet(['RB']),
++                read_regs=OrderedSet(['RB', 'RS']),
+                 uninit_regs=OrderedSet(['RA']), write_regs=OrderedSet(['RA']),
+                 special_regs=OrderedSet(), op_fields=OrderedSet(),
+                 form='X',
index 8808ac3a15c9ac407fd604cde8ff829147e2c4e1..5bb28c7d1e4a2eb7f9422d3f00a75e631ebef70f 100644 (file)
@@ -614,8 +614,6 @@ class PowerParser:
         name = p[1]
         if name in self.available_op_fields:
             self.op_fields.add(name)
-        if name in self.gprs:
-            self.read_regs.add(name)  # add to list of regs to read
         if name in ['CR', 'LR', 'CTR', 'TAR', 'FPSCR', 'MSR']:
             self.special_regs.add(name)
             self.write_regs.add(name) # and add to list to write