- # XER is constructed
- with m.Case(SPR.XER):
- # sticky
- comb += o[63-XER_bits['SO']].eq(so_i)
- # overflow
- comb += o[63-XER_bits['OV']].eq(ov_i[0])
- comb += o[63-XER_bits['OV32']].eq(ov_i[1])
- # carry
- comb += o[63-XER_bits['CA']].eq(ca_i[0])
- comb += o[63-XER_bits['CA32']].eq(ca_i[1])
+ with m.If(spr == SPR.XER):
+ # bits 0:31 and 35:43 are treated as reserved
+ # and return 0s when read using mfxer
+ comb += o[32:64].eq(0) # MBS0 bits 0-31
+ comb += o[63-43:64-35].eq(0) # MSB0 bits 35-43
+ # sticky
+ comb += o[63-XER_bits['SO']].eq(so_i)
+ # overflow
+ comb += o[63-XER_bits['OV']].eq(ov_i[0])
+ comb += o[63-XER_bits['OV32']].eq(ov_i[1])
+ # carry
+ comb += o[63-XER_bits['CA']].eq(ca_i[0])
+ comb += o[63-XER_bits['CA32']].eq(ca_i[1])