+ # TODO: this needs to now be read_fast1.data and read_fast2.data
+ if False:
+ fast1_en = yield dec2.e.read_fast1.ok
+ if fast1_en:
+ fast1_sel = yield dec2.e.read_fast1.data
+ spr1_sel = fast_reg_to_spr(fast1_sel)
+ spr1_data = sim.spr[spr1_sel].value
+ yield branch.p.data_i.spr1.eq(spr1_data)
+
+ fast2_en = yield dec2.e.read_fast2.ok
+ if fast2_en:
+ fast2_sel = yield dec2.e.read_fast2.data
+ spr2_sel = fast_reg_to_spr(fast2_sel)
+ spr2_data = sim.spr[spr2_sel].value
+ yield branch.p.data_i.spr2.eq(spr2_data)
+
+ # TODO: drop this once it's in PowerDecode2
+ # (actually, DecodeA and DecodeB)