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too much debug info going past, so add the test registers to the
[soc.git]
/
src
/
soc
/
fu
/
div
/
test
/
drwxr-xr-x
..
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10193
runner.py
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2249
test_all_pipe_caller.py
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-rw-r--r--
12348
test_fsm.py
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-rw-r--r--
6532
test_pipe_caller.py
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