src/f16.rs

   1 use core::ops::{
   2     Add, AddAssign, Div, DivAssign, Mul, MulAssign, Neg, Rem, RemAssign, Sub, SubAssign,
   3 };
   4
   5 use crate::traits::{ConvertTo, Float};
   6
   7 #[cfg(feature = "f16")]
   8 use half::f16 as F16Impl;
   9
  10 #[cfg(not(feature = "f16"))]
  11 type F16Impl = u16;
  12
  13 #[derive(Clone, Copy, PartialEq, PartialOrd, Debug)]
  14 #[repr(transparent)]
  15 pub struct F16(F16Impl);
  16
  17 #[cfg(feature = "f16")]
  18 macro_rules! f16_impl {
  19     ($v:expr, [$($vars:ident),*]) => {
  20         $v
  21     };
  22 }
  23
  24 #[cfg(not(feature = "f16"))]
  25 macro_rules! f16_impl {
  26     ($v:expr, [$($vars:ident),*]) => {
  27         {
  28             $(let _ = $vars;)*
  29             panic!("f16 feature is not enabled")
  30         }
  31     };
  32 }
  33
  34 impl From<F16Impl> for F16 {
  35     fn from(v: F16Impl) -> Self {
  36         F16(v)
  37     }
  38 }
  39
  40 impl From<F16> for F16Impl {
  41     fn from(v: F16) -> Self {
  42         v.0
  43     }
  44 }
  45
  46 macro_rules! impl_f16_from {
  47     ($($ty:ident,)*) => {
  48         $(
  49             impl From<$ty> for F16 {
  50                 fn from(v: $ty) -> Self {
  51                     f16_impl!(F16(F16Impl::from(v)), [v])
  52                 }
  53             }
  54
  55             impl ConvertTo<F16> for $ty {
  56                 fn to(self) -> F16 {
  57                     self.into()
  58                 }
  59             }
  60         )*
  61     };
  62 }
  63
  64 macro_rules! impl_from_f16 {
  65     ($($ty:ident,)*) => {
  66         $(
  67             impl From<F16> for $ty {
  68                 fn from(v: F16) -> Self {
  69                     f16_impl!(v.0.into(), [v])
  70                 }
  71             }
  72
  73             impl ConvertTo<$ty> for F16 {
  74                 fn to(self) -> $ty {
  75                     self.into()
  76                 }
  77             }
  78         )*
  79     };
  80 }
  81
  82 impl_f16_from![i8, u8,];
  83
  84 impl_from_f16![f32, f64,];
  85
  86 macro_rules! impl_int_to_f16 {
  87     ($($int:ident),*) => {
  88         $(
  89             impl ConvertTo<F16> for $int {
  90                 fn to(self) -> F16 {
  91                     // f32 has enough mantissa bits such that f16 overflows to
  92                     // infinity before f32 stops being able to properly
  93                     // represent integer values, making the below conversion correct.
  94                     (self as f32).to()
  95                 }
  96             }
  97         )*
  98     };
  99 }
 100
 101 macro_rules! impl_f16_to_int {
 102     ($($int:ident),*) => {
 103         $(
 104             impl ConvertTo<$int> for F16 {
 105                 fn to(self) -> $int {
 106                     f32::from(self) as $int
 107                 }
 108             }
 109         )*
 110     };
 111 }
 112
 113 impl_int_to_f16![i16, u16, i32, u32, i64, u64, i128, u128];
 114 impl_f16_to_int![i8, u8, i16, u16, i32, u32, i64, u64, i128, u128];
 115
 116 impl ConvertTo<F16> for f32 {
 117     fn to(self) -> F16 {
 118         f16_impl!(F16(F16Impl::from_f32(self)), [])
 119     }
 120 }
 121
 122 impl ConvertTo<F16> for f64 {
 123     fn to(self) -> F16 {
 124         f16_impl!(F16(F16Impl::from_f64(self)), [])
 125     }
 126 }
 127
 128 impl Neg for F16 {
 129     type Output = Self;
 130
 131     fn neg(self) -> Self::Output {
 132         f16_impl!(Self::from_bits(self.to_bits() ^ 0x8000), [])
 133     }
 134 }
 135
 136 macro_rules! impl_bin_op_using_f32 {
 137     ($($op:ident, $op_fn:ident, $op_assign:ident, $op_assign_fn:ident;)*) => {
 138         $(
 139             impl $op for F16 {
 140                 type Output = Self;
 141
 142                 fn $op_fn(self, rhs: Self) -> Self::Output {
 143                     f32::from(self).$op_fn(f32::from(rhs)).to()
 144                 }
 145             }
 146
 147             impl $op_assign for F16 {
 148                 fn $op_assign_fn(&mut self, rhs: Self) {
 149                     *self = (*self).$op_fn(rhs);
 150                 }
 151             }
 152         )*
 153     };
 154 }
 155
 156 impl_bin_op_using_f32! {
 157     Add, add, AddAssign, add_assign;
 158     Sub, sub, SubAssign, sub_assign;
 159     Mul, mul, MulAssign, mul_assign;
 160     Div, div, DivAssign, div_assign;
 161     Rem, rem, RemAssign, rem_assign;
 162 }
 163
 164 impl Float<u32> for F16 {
 165     type BitsType = u16;
 166
 167     fn abs(self) -> Self {
 168         f16_impl!(Self::from_bits(self.to_bits() & 0x7FFF), [])
 169     }
 170
 171     fn trunc(self) -> Self {
 172         f32::from(self).trunc().to()
 173     }
 174
 175     fn ceil(self) -> Self {
 176         f32::from(self).ceil().to()
 177     }
 178
 179     fn floor(self) -> Self {
 180         f32::from(self).floor().to()
 181     }
 182
 183     fn round(self) -> Self {
 184         f32::from(self).round().to()
 185     }
 186
 187     #[cfg(feature = "fma")]
 188     fn fma(self, a: Self, b: Self) -> Self {
 189         (f64::from(self) * f64::from(a) + f64::from(b)).to()
 190     }
 191
 192     fn is_nan(self) -> Self::Bool {
 193         f16_impl!(self.0.is_nan(), [])
 194     }
 195
 196     fn is_infinite(self) -> Self::Bool {
 197         f16_impl!(self.0.is_infinite(), [])
 198     }
 199
 200     fn is_finite(self) -> Self::Bool {
 201         f16_impl!(self.0.is_finite(), [])
 202     }
 203
 204     fn from_bits(v: Self::BitsType) -> Self {
 205         #[cfg(feature = "f16")]
 206         return F16(F16Impl::from_bits(v));
 207         #[cfg(not(feature = "f16"))]
 208         return F16(v);
 209     }
 210
 211     fn to_bits(self) -> Self::BitsType {
 212         #[cfg(feature = "f16")]
 213         return self.0.to_bits();
 214         #[cfg(not(feature = "f16"))]
 215         return self.0;
 216     }
 217 }
 218
 219 #[cfg(test)]
 220 mod tests {
 221     use super::*;
 222     use core::cmp::Ordering;
 223
 224     #[test]
 225     #[cfg_attr(
 226         not(feature = "f16"),
 227         should_panic(expected = "f16 feature is not enabled")
 228     )]
 229     fn test_abs() {
 230         assert_eq!(F16::from_bits(0x8000).abs().to_bits(), 0);
 231         assert_eq!(F16::from_bits(0).abs().to_bits(), 0);
 232         assert_eq!(F16::from_bits(0x8ABC).abs().to_bits(), 0xABC);
 233         assert_eq!(F16::from_bits(0xFE00).abs().to_bits(), 0x7E00);
 234         assert_eq!(F16::from_bits(0x7E00).abs().to_bits(), 0x7E00);
 235     }
 236
 237     #[test]
 238     #[cfg_attr(
 239         not(feature = "f16"),
 240         should_panic(expected = "f16 feature is not enabled")
 241     )]
 242     fn test_neg() {
 243         assert_eq!(F16::from_bits(0x8000).neg().to_bits(), 0);
 244         assert_eq!(F16::from_bits(0).neg().to_bits(), 0x8000);
 245         assert_eq!(F16::from_bits(0x8ABC).neg().to_bits(), 0xABC);
 246         assert_eq!(F16::from_bits(0xFE00).neg().to_bits(), 0x7E00);
 247         assert_eq!(F16::from_bits(0x7E00).neg().to_bits(), 0xFE00);
 248     }
 249
 250     #[test]
 251     #[cfg_attr(
 252         not(feature = "f16"),
 253         should_panic(expected = "f16 feature is not enabled")
 254     )]
 255     fn test_int_to_f16() {
 256         assert_eq!(F16::to_bits(0u32.to()), 0);
 257         for v in 1..0x20000u32 {
 258             let leading_zeros = u32::leading_zeros(v);
 259             let shifted_v = v << leading_zeros;
 260             // round to nearest, ties to even
 261             let round_up = match (shifted_v & 0x1FFFFF).cmp(&0x100000) {
 262                 Ordering::Less => false,
 263                 Ordering::Equal => (shifted_v & 0x200000) != 0,
 264                 Ordering::Greater => true,
 265             };
 266             let (rounded, carry) =
 267                 (shifted_v & !0x1FFFFF).overflowing_add(round_up.then(|| 0x200000).unwrap_or(0));
 268             let mantissa;
 269             if carry {
 270                 mantissa = (rounded >> 22) as u16 + 0x400;
 271             } else {
 272                 mantissa = (rounded >> 21) as u16;
 273             }
 274             assert_eq!((mantissa & !0x3FF), 0x400);
 275             let exponent = 31 - leading_zeros as u16 + 15 + carry as u16;
 276             let expected = if exponent < 0x1F {
 277                 (mantissa & 0x3FF) + (exponent << 10)
 278             } else {
 279                 0x7C00
 280             };
 281             let actual = F16::to_bits(v.to());
 282             assert_eq!(
 283                 actual, expected,
 284                 "actual = {:#X}, expected = {:#X}, v = {:#X}",
 285                 actual, expected, v
 286             );
 287         }
 288     }
 289 }