1 # -*- explicit-buffer-name: "Makefile<6502/cmos45>" -*-
3 LOGICAL_SYNTHESIS = Yosys
4 PHYSICAL_SYNTHESIS = Coriolis
12 NETLISTS = $(shell cat nets2.txt)
15 include ./mk/design-flow.mk
18 blif: part_sig_add.blif
20 layout: part_sig_add_cts_r.ap
21 gds: part_sig_add_cts_r.gds
23 lvx: lvx-part_sig_add_cts_r
24 druc: druc-part_sig_add_cts_r
25 view: cgt-part_sig_add_cts_r