1 from nmigen
import Module
, Signal
4 """ Content Addressable Memory (CAM) Entry
6 The purpose of this module is to represent an entry within a CAM.
7 This module when given a read command will compare the given data
8 and output whether a match was found or not. When given a write
9 command it will write the given data into internal registers.
12 def __init__(self
, data_size
):
14 * data_size: (bit count) The size of the data
17 self
.command
= Signal(2) # 00 => NA 01 => Read 10 => Write 11 => Reset
18 self
.data_in
= Signal(data_size
) # Data input when writing
21 self
.match
= Signal(1) # Result of the internal/input key comparison
22 self
.data
= Signal(data_size
)
24 def elaborate(self
, platform
=None):
26 with m
.Switch(self
.command
):
28 m
.d
.sync
+= self
.match
.eq(0)
30 with m
.If(self
.data
== self
.data_in
):
31 m
.d
.sync
+= self
.match
.eq(1)
33 m
.d
.sync
+= self
.match
.eq(0)
36 self
.data
.eq(self
.data_in
),