TLB/test/test_cam_entry.py

   1 import sys
   2 sys.path.append("../src")
   3 sys.path.append("../../TestUtil")
   4
   5 from nmigen.compat.sim import run_simulation
   6
   7 from test_helper import assert_eq, assert_ne, assert_op
   8 from CamEntry import CamEntry
   9
  10 # This function allows for the easy setting of values to the Cam Entry
  11 # unless the key is incorrect
  12 # Arguments:
  13 #   dut: The CamEntry being tested
  14 #   c (command): NA (0), Read (1), Write (2), Reserve (3)
  15 #   d (data): The data to be set
  16 def set_cam_entry(dut, c, d):
  17     # Write desired values
  18     yield dut.command.eq(c)
  19     yield dut.data_in.eq(d)
  20     yield
  21     # Reset all lines
  22     yield dut.command.eq(0)
  23     yield dut.data_in.eq(0)
  24     yield
  25
  26 # Checks the data state of the CAM entry
  27 # Arguments:
  28 #   dut: The CamEntry being tested
  29 #   d (Data): The expected data
  30 #   op (Operation): (0 => ==), (1 => !=)
  31 def check_data(dut, d, op):
  32     out_d = yield dut.data
  33     assert_op("Data", out_d, d, op)
  34
  35 # Checks the match state of the CAM entry
  36 # Arguments:
  37 #   dut: The CamEntry being tested
  38 #   m (Match): The expected match
  39 #   op (Operation): (0 => ==), (1 => !=)
  40 def check_match(dut, m, op):
  41     out_m = yield dut.match
  42     assert_op("Match", out_m, m, op)
  43
  44 # Checks the state of the CAM entry
  45 # Arguments:
  46 #   dut: The CamEntry being tested
  47 #   d (data): The expected data
  48 #   m (match): The expected match
  49 #   d_op (Operation): The operation for the data assertion (0 => ==), (1 => !=)
  50 #   m_op (Operation): The operation for the match assertion (0 => ==), (1 => !=)
  51 def check_all(dut, d, m, d_op, m_op):
  52     yield from check_data(dut, d, d_op)
  53     yield from check_match(dut, m, m_op)
  54
  55 # This testbench goes through the paces of testing the CamEntry module
  56 # It is done by writing and then reading various combinations of key/data pairs
  57 # and reading the results with varying keys to verify the resulting stored
  58 # data is correct.
  59 def testbench(dut):
  60     # Check write
  61     command = 2
  62     data = 1
  63     match = 0
  64     yield from set_cam_entry(dut, command, data)
  65     yield from check_all(dut, data, match, 0, 0)
  66
  67     # Check read miss
  68     command = 1
  69     data = 2
  70     match = 0
  71     yield from set_cam_entry(dut, command, data)
  72     yield from check_all(dut, data, match, 1, 0)
  73
  74     # Check read hit
  75     command = 1
  76     data = 1
  77     match = 1
  78     yield from set_cam_entry(dut, command, data)
  79     yield from check_all(dut, data, match, 0, 0)
  80
  81     # Check overwrite
  82     command = 2
  83     data = 5
  84     match = 0
  85     yield from set_cam_entry(dut, command, data)
  86     yield
  87     yield from check_all(dut, data, match, 0, 0)
  88
  89     # Check read hit
  90     command = 1
  91     data = 5
  92     match = 1
  93     yield from set_cam_entry(dut, command, data)
  94     yield from check_all(dut, data, match, 0, 0)
  95
  96     # Check reset
  97     command = 3
  98     data = 0
  99     match = 0
 100     yield from set_cam_entry(dut, command, data)
 101     yield from check_all(dut, data, match, 0, 0)
 102
 103     # Extra clock cycle for waveform
 104     yield
 105
 106 if __name__ == "__main__":
 107     dut = CamEntry(4)
 108     run_simulation(dut, testbench(dut), vcd_name="Waveforms/cam_entry_test.vcd")
 109     print("CamEntry Unit Test Success")