experiments12/doDesign.py

   1
   2 from   __future__ import print_function
   3 import sys
   4 import traceback
   5 import collections
   6 import CRL
   7 import helpers
   8 helpers.loadUserSettings()
   9 from   helpers         import trace, l, u, n
  10 from   helpers.io      import ErrorMessage, WarningMessage
  11 from   helpers.overlay import UpdateSession
  12 import plugins
  13 from   Hurricane  import Breakpoint, DbU, Point, Box, Transformation, Instance, \
  14                          DataBase
  15 from   plugins.alpha.macro.macro          import Macro
  16 from   plugins.alpha.block.block          import Block
  17 from   plugins.alpha.block.configuration  import IoPin, GaugeConf
  18 from   plugins.alpha.core2chip.libresocio import CoreToChip
  19 from   plugins.alpha.chip.configuration   import ChipConf
  20 from   plugins.alpha.chip.chip            import Chip
  21
  22
  23 af = CRL.AllianceFramework.get()
  24
  25
  26 def isiterable ( pyobj ):
  27     if isinstance(pyobj,collections.Iterable): return True
  28     return False
  29
  30
  31 def doIoPinVector ( ioSpec, bits ):
  32     v = []
  33     if not isiterable(bits): bits = range(bits)
  34     if len(ioSpec) != 5:
  35         raise ErrorMessage( 1, [ 'doIoPinVector(): Argument "ioSpec" must have excatly 5 fields ({})'.format(len(ioSpec))
  36                                , '(ioSpec={})'.format(ioSpec)
  37                                ] )
  38     if not bits:
  39         raise ErrorMessage( 1, [ 'doIoPinVector(): Argument "bits" is neither a width nor an iterable.'
  40                                , '(bits={})'.format(bits)
  41                                ] )
  42     for bit in bits:
  43         v.append(( ioSpec[0]
  44                  , ioSpec[1]
  45                  , ioSpec[2].format(bit)
  46                  , ioSpec[3].format(bit)
  47                  , ioSpec[4].format(bit) ))
  48     return v
  49
  50
  51 def scriptMain ( **kw ):
  52     """The mandatory function to be called by Coriolis CGT/Unicorn."""
  53     global af
  54     rvalue = True
  55     try:
  56         #helpers.setTraceLevel( 550 )
  57         Breakpoint.setStopLevel( 100 )
  58         buildChip = True
  59         cell, editor = plugins.kwParseMain( **kw )
  60         cell = af.getCell( 'memory', CRL.Catalog.State.Logical )
  61         if editor:
  62             editor.setCell( cell )
  63             editor.setDbuMode( DbU.StringModePhysical )
  64
  65         ioPadsSpec = []
  66         ioPadsSpec += doIoPinVector( (IoPin.WEST , None,  'a_{}',  'a({})',  'a({})'),  8 )
  67         ioPadsSpec += doIoPinVector( (IoPin.SOUTH, None,  'b_{}',  'b({})',  'b({})'),  8 )
  68         ioPadsSpec += doIoPinVector( (IoPin.EAST , None,  'f_{}',  'f({})',  'f({})'),  8 )
  69         ioPadsSpec += doIoPinVector( (IoPin.NORTH, None, 'we_{}', 'we({})', 'we({})'), range(0,4) )
  70         ioPadsSpec += [ (IoPin.NORTH, None, 'clk'       , 'clk', 'clk' )
  71                       , (IoPin.NORTH, None, 'power_0'   , 'vdd'    )
  72                       , (IoPin.NORTH, None, 'ground_0'  , 'vss'    )
  73                       , (IoPin.NORTH, None, 'ioground_0', 'iovss'  )
  74                       , (IoPin.NORTH, None, 'iopower_0' , 'iovdd'  )
  75                       , (IoPin.NORTH, None, 'iopower_1' , 'iovdd'  )
  76                       , (IoPin.NORTH, None, 'rst'       , 'rst', 'rst' )
  77                       ]
  78         ioPadsSpec += doIoPinVector( (IoPin.NORTH, None, 'we_{}', 'we({})', 'we({})'), range(4,8) )
  79         ioPinsSpec = [ (IoPin.WEST |IoPin.A_BEGIN, 'a({})'  , u(  3.3), u( 6.6), 64)
  80                      , (IoPin.SOUTH|IoPin.A_BEGIN, 'b({})'  , u(  3.3), u( 6.6), 64)
  81                      , (IoPin.EAST |IoPin.A_BEGIN, 'f({})'  , u(  3.3), u( 6.6), 64)
  82                      , (IoPin.NORTH|IoPin.A_BEGIN, 'we({})' , u(  3.3), u( 6.6),  8)
  83                      , (IoPin.NORTH|IoPin.A_BEGIN, 'rst'    , u( 33.0),      0 ,  1)
  84                      , (IoPin.NORTH|IoPin.A_BEGIN, 'clk'    , u( 66.0),      0 ,  1)
  85                      ]
  86         memoryConf = ChipConf( cell, ioPins=ioPinsSpec, ioPads=ioPadsSpec )
  87         memoryConf.cfg.viewer.pixelThreshold       = 5
  88         memoryConf.cfg.etesian.bloat               = 'nsxlib'
  89         memoryConf.cfg.etesian.uniformDensity      = True
  90         memoryConf.cfg.etesian.aspectRatio         = 1.0
  91        # etesian.spaceMargin is ignored if the coreSize is directly set.
  92         memoryConf.cfg.etesian.spaceMargin         = 0.20
  93         memoryConf.cfg.anabatic.searchHalo         = 2
  94         memoryConf.cfg.anabatic.globalIterations   = 20
  95         memoryConf.cfg.anabatic.topRoutingLayer    = 'METAL5'
  96         memoryConf.cfg.katana.hTracksReservedLocal = 6
  97         memoryConf.cfg.katana.vTracksReservedLocal = 3
  98         memoryConf.cfg.katana.hTracksReservedMin   = 3
  99         memoryConf.cfg.katana.vTracksReservedMin   = 1
 100         memoryConf.cfg.block.spareSide             = u(200)
 101        #memoryConf.cfg.chip.padCoreSide            = 'North'
 102        #memoryConf.cfg.chip.use45corners           = False
 103         memoryConf.cfg.chip.useAbstractPads        = True
 104         memoryConf.cfg.chip.supplyRailWidth        = u(35)
 105         memoryConf.cfg.chip.supplyRailPitch        = u(90)
 106         memoryConf.editor              = editor
 107         memoryConf.useSpares           = True
 108         memoryConf.useClockTree        = True
 109         memoryConf.useHFNS             = False
 110         memoryConf.bColumns            = 2
 111         memoryConf.bRows               = 3
 112         memoryConf.chipName            = 'chip'
 113         memoryConf.chipConf.ioPadGauge = 'LibreSOCIO'
 114         memoryConf.coreSize            = ( u( 988.0), u( 988.0) )
 115         memoryConf.chipSize            = ( u(2000.0), u(2000.0) )
 116
 117         with UpdateSession():
 118             coreAb = Box( 0, 0, u(988.0), u(988.0) )
 119             cell.setAbutmentBox( coreAb )
 120
 121         if buildChip:
 122             memoryToChip = CoreToChip( memoryConf )
 123             memoryToChip.buildChip()
 124             chipBuilder = Chip( memoryConf )
 125             chipBuilder.doChipFloorplan()
 126             with UpdateSession():
 127                 sramName = 'spblock_512w64b8w'
 128                 sram     = DataBase.getDB().getCell( 'spblock_512w64b8w' )
 129                 if not sram:
 130                     print( '[ERROR] SRAM cell "{}" not found.'.format(sramName) )
 131                 else:
 132                     sliceHeight = memoryToChip.conf.sliceHeight
 133                     coreAb      = cell.getAbutmentBox()
 134                     sramAb      = sram.getAbutmentBox()
 135                     position    = Transformation( coreAb.getXMax() - sramAb.getWidth() - 2*sliceHeight
 136                                                 , u(0.0)
 137                                                 , Transformation.Orientation.ID )
 138                     chipBuilder.placeMacro( 'spblock_512w64b8w', position )
 139                     memoryConf.placeArea = Box( coreAb.getXMin()
 140                                               , coreAb.getYMax() - sliceHeight*26
 141                                               , coreAb.getXMin() + sliceHeight*25
 142                                               , coreAb.getYMax()
 143                                               )
 144             Breakpoint.stop( 99, 'After core block placement.' )
 145             rvalue = chipBuilder.doPnR()
 146             chipBuilder.save()
 147             CRL.Gds.save( memoryConf.chip )
 148         else:
 149             blockBuilder = Block( memoryConf )
 150             rvalue = blockBuilder.doPnR()
 151             blockBuilder.save()
 152             CRL.Gds.save( memoryConf.cell )
 153     except Exception, e:
 154         helpers.io.catch( e )
 155         rvalue = False
 156     sys.stdout.flush()
 157     sys.stderr.flush()
 158     return rvalue