experiments9/Makefile

   1
   2         LOGICAL_SYNTHESIS = Yosys
   3        PHYSICAL_SYNTHESIS = Coriolis
   4                DESIGN_KIT = sxlib
   5
   6             YOSYS_SET_TOP = Yes
   7             USE_CLOCKTREE = No
   8                 USE_DEBUG = No
   9                  USE_KITE = No
  10                 VST_FLAGS = --vst-use-concat
  11
  12                  NETLISTS = $(shell cat cells.lst)
  13 #            YOSYS_FLATTEN = $(shell cat flatten.lst)
  14
  15
  16
  17  include ./mk/design-flow.mk
  18
  19 pinmux:
  20         python ../pinmux/src/pinmux_generator.py -v -s ls180 -o coriolis2/ls180
  21         ln -f -s ../pinmux/src/parse.py coriolis2/pinparse.py
  22
  23 blif:      ls180.blif
  24 vst:       ls180.vst
  25
  26 layout:    ls180_r.ap
  27 gds:       ls180_r.gds
  28
  29 lvx:       lvx-ls180_r
  30 druc:      druc-ls180_r
  31 view:      cgt-ls180_r
  32 viewn:     cgt-ls180