experiments9/doDesign.py

   1
   2 from   __future__ import print_function
   3 import sys
   4 import traceback
   5 import CRL
   6 import helpers
   7 from   helpers.io import ErrorMessage
   8 from   helpers.io import WarningMessage
   9 from   helpers    import trace, l
  10 import plugins
  11 from   Hurricane  import DbU
  12 from   Hurricane  import Pin
  13 from   Hurricane  import Transformation
  14 from   plugins.alpha.block.block         import Block
  15 from   plugins.alpha.block.configuration import IoPin
  16
  17
  18 af = CRL.AllianceFramework.get()
  19
  20
  21 def scriptMain ( **kw ):
  22     """The mandatory function that Coriolis CGT/Unicorn will look for."""
  23     global af
  24
  25     IW = IoPin.WEST
  26     IE = IoPin.EAST
  27     IS = IoPin.SOUTH
  28     IN = IoPin.NORTH
  29     AB = IoPin.A_BEGIN
  30     AE = IoPin.A_END
  31
  32     alup=[
  33         (IW | AB, 'clk'                             , 0 ),
  34         (IW | AB, 'cu_issue_i'                      , 0 ),
  35         (IW | AB, 'oper_i_alu_alu0_imm_data_imm_ok' , 0 ),
  36         (IW | AB, 'oper_i_alu_alu0_invert_a'        , 0 ),
  37         (IW | AB, 'oper_i_alu_alu0_invert_out'      , 0 ),
  38         (IW | AB, 'oper_i_alu_alu0_is_32bit'        , 0 ),
  39         (IW | AB, 'oper_i_alu_alu0_is_signed'       , 0 ),
  40         (IW | AB, 'oper_i_alu_alu0_oe_oe'           , 0 ),
  41         (IW | AB, 'oper_i_alu_alu0_oe_oe_ok'        , 0 ),
  42         (IW | AB, 'oper_i_alu_alu0_output_carry'    , 0 ),
  43         (IW | AB, 'oper_i_alu_alu0_rc_rc'           , 0 ),
  44         (IW | AB, 'oper_i_alu_alu0_rc_rc_ok'        , 0 ),
  45         (IW | AB, 'oper_i_alu_alu0_write_cr0'       , 0 ),
  46         (IW | AB, 'oper_i_alu_alu0_zero_a'          , 0 ),
  47         (IW | AB, 'rst'                             , 0 ),
  48         (IW | AB, 'src3_i'                          , 0 ),
  49         (IW | AB, 'oper_i_alu_alu0_input_carry({})' , 0, l( 10.0),  2),
  50         (IW | AB, 'src4_i({})'                      , 0, l( 10.0),  2),
  51         (IW | AB, 'oper_i_alu_alu0_data_len({})'    , 0, l( 10.0),  4),
  52         (IW | AB, 'cu_rd_go_i({})'                  , 0, l( 10.0),  4),
  53         (IW | AB, 'cu_rdmaskn_i({})'                , 0, l( 10.0),  4),
  54         (IW | AB, 'cu_wr_go_i({})'                  , 0, l( 10.0),  5),
  55         (IW | AB, 'oper_i_alu_alu0_insn_type({})'   , 0, l( 10.0),  7),
  56         (IW | AB, 'oper_i_alu_alu0_fn_unit({})'     , 0, l( 10.0), 11),
  57         (IW | AB, 'oper_i_alu_alu0_insn({})'        , 0, l( 10.0), 32),
  58         (IW | AB, 'oper_i_alu_alu0_imm_data_imm({})', 0, l( 15.0), 64),
  59         (IS    , 'src1_i({})'                      , l(10), l( 15.0), 64),
  60         (IS    , 'src2_i({})'                      , l(15), l( 15.0), 64),
  61         (IN    , 'dest1_o({})'                     , l(20), l( 15.0), 64),
  62         (IE | AE  , 'cu_busy_o'                       , 0 ),
  63         (IE | AE  , 'cr_a_ok'                         , 0 ),
  64         (IE | AE  , 'dest5_o'                         , 0 ),
  65         (IE | AE  , 'o_ok'                            , 0 ),
  66         (IE | AE  , 'xer_ca_ok'                       , 0 ),
  67         (IE | AE  , 'xer_ov_ok'                       , 0 ),
  68         (IE | AE  , 'xer_so_ok'                       , 0 ),
  69         (IE | AE  , 'dest3_o({})'                     , 0, l( 20.0),  2),
  70         (IE | AE  , 'dest4_o({})'                     , 0, l( 20.0),  2),
  71         (IE | AE  , 'dest2_o({})'                     , 0, l( 20.0),  4),
  72         (IE | AE  , 'cu_rd_rel_o({})'                 , 0, l( 20.0),  4),
  73         (IE | AE  , 'cu_wr_rel_o({})'                 , 0, l( 20.0),  5),
  74         ]
  75
  76     rvalue = True
  77     try:
  78         helpers.setTraceLevel( 550 )
  79         cell, editor = plugins.kwParseMain( **kw )
  80
  81         alu0 = af.getCell( 'alu0', CRL.Catalog.State.Views )
  82         blockAlu0 = Block.create (alu0, ioPins = alup)
  83         blockAlu0.state.cfg.etesian.spaceMargin = 0.05
  84         blockAlu0.state.fixedHeight = l(5000)
  85         blockAlu0.state.useSpares   = False
  86        #rvalue = blockAlu0.build()
  87
  88         divp=[
  89             (IN     , 'clk'                             , l(4500.0) ),
  90             (IW | AB, 'cu_issue_i'                      , 0, l(20) ),
  91             (IW | AB, 'oper_i_alu_div0_imm_data_imm_ok' , 0, l(20) ),
  92             (IW | AB, 'oper_i_alu_div0_invert_a'        , 0, l(20) ),
  93             (IW | AB, 'oper_i_alu_div0_invert_out'      , 0, l(20) ),
  94             (IW | AB, 'oper_i_alu_div0_is_32bit'        , 0, l(20) ),
  95             (IW | AB, 'oper_i_alu_div0_is_signed'       , 0, l(20) ),
  96             (IW | AB, 'oper_i_alu_div0_oe_oe'           , 0, l(20) ),
  97             (IW | AB, 'oper_i_alu_div0_oe_oe_ok'        , 0, l(20) ),
  98             (IW | AB, 'oper_i_alu_div0_output_carry'    , 0, l(20) ),
  99             (IW | AB, 'oper_i_alu_div0_rc_rc'           , 0, l(20) ),
 100             (IW | AB, 'oper_i_alu_div0_rc_rc_ok'        , 0, l(20) ),
 101             (IW | AB, 'oper_i_alu_div0_write_cr0'       , 0, l(20) ),
 102             (IW | AB, 'oper_i_alu_div0_zero_a'          , 0, l(20) ),
 103             (IW | AB, 'rst'                             , 0, l(20) ),
 104             (IW | AB, 'src3_i'                          , 0, l(20) ),
 105             (IW | AB, 'cu_rd_go_i({})'                  , 0, l(10.0),  3),
 106             (IW | AB, 'cu_rdmaskn_i({})'                , 0, l(10.0),  3),
 107             (IW | AB, 'cu_wr_go_i({})'                  , 0, l(10.0),  4),
 108             (IW | AB, 'oper_i_alu_div0_data_len'        , 0, l(10.0),  7),
 109             (IW | AB, 'oper_i_alu_div0_insn_type({})'   , 0, l(10.0),  7),
 110             (IW | AB, 'oper_i_alu_div0_fn_unit({})'     , 0, l(10.0), 11),
 111             (IW | AB, 'oper_i_alu_div0_insn({})'        , 0, l(10.0), 32),
 112             (IW | AB, 'oper_i_alu_div0_imm_data_imm({})', 0, l(15.0), 64),
 113             (IS | AB, 'src1_i({})'                      , l(10.0), l(50.0), 64),
 114             (IS | AB, 'src2_i({})'                      , l(20.0), l(50.0), 64),
 115             (IE | AE  , 'cu_busy_o'                       , 0 ),
 116             (IE | AE  , 'cr_a_ok'                         , 0 ),
 117             (IE | AE  , 'dest4_o'                         , 0 ),
 118             (IE | AE  , 'o_ok'                            , 0 ),
 119             (IE | AE  , 'xer_ov_ok'                       , 0 ),
 120             (IE | AE  , 'xer_so_ok'                       , 0 ),
 121             (IE | AE  , 'dest3_o({})'                     , 0, l( 20.0),  2),
 122             (IE | AE  , 'dest2_o({})'                     , 0, l( 20.0),  4),
 123             (IE | AE  , 'cu_rd_rel_o({})'                 , 0, l( 20.0),  3),
 124             (IE | AE  , 'cu_wr_rel_o({})'                 , 0, l( 20.0),  4),
 125             (IN | AE  , 'dest1_o({})'                     , 0, l( 30.0), 64),
 126              ]
 127         div0 = af.getCell( 'div0', CRL.Catalog.State.Views )
 128         blockDiv0 = Block.create ( div0 , ioPins=divp)
 129         blockDiv0.state.cfg.etesian.uniformDensity = True
 130         blockDiv0.state.cfg.etesian.spaceMargin    = 0.10
 131         blockDiv0.state.cfg.katana.searchHalo      = 1
 132         blockDiv0.state.fixedHeight = l(5000)
 133         blockDiv0.state.useSpares   = False
 134        #rvalue = blockDiv0.build()
 135
 136         mulp=[
 137             (IN     , 'clk'                             , l(4500.0) ),
 138             (IW | AB, 'cu_issue_i'                      , 0, l(20) ),
 139             (IW | AB, 'oper_i_alu_mul0_imm_data_imm_ok' , 0, l(20) ),
 140             (IW | AB, 'oper_i_alu_mul0_invert_a'        , 0, l(20) ),
 141             (IW | AB, 'oper_i_alu_mul0_invert_out'      , 0, l(20) ),
 142             (IW | AB, 'oper_i_alu_mul0_is_32bit'        , 0, l(20) ),
 143             (IW | AB, 'oper_i_alu_mul0_is_signed'       , 0, l(20) ),
 144             (IW | AB, 'oper_i_alu_mul0_oe_oe'           , 0, l(20) ),
 145             (IW | AB, 'oper_i_alu_mul0_oe_oe_ok'        , 0, l(20) ),
 146             (IW | AB, 'oper_i_alu_mul0_rc_rc'           , 0, l(20) ),
 147             (IW | AB, 'oper_i_alu_mul0_rc_rc_ok'        , 0, l(20) ),
 148             (IW | AB, 'oper_i_alu_mul0_write_cr0'       , 0, l(20) ),
 149             (IW | AB, 'oper_i_alu_mul0_zero_a'          , 0, l(20) ),
 150             (IW | AB, 'rst'                             , 0, l(20) ),
 151             (IW | AB, 'src3_i'                          , 0, l(20) ),
 152             (IW | AB, 'cu_rd_go_i({})'                  , 0, l(10.0),  3),
 153             (IW | AB, 'cu_rdmaskn_i({})'                , 0, l(10.0),  3),
 154             (IW | AB, 'cu_wr_go_i({})'                  , 0, l(10.0),  4),
 155             (IW | AB, 'oper_i_alu_mul0_insn_type({})'   , 0, l(10.0),  7),
 156             (IW | AB, 'oper_i_alu_mul0_fn_unit({})'     , 0, l(10.0), 11),
 157             (IW | AB, 'oper_i_alu_mul0_insn({})'        , 0, l(10.0), 32),
 158             (IW | AB, 'oper_i_alu_mul0_imm_data_imm({})', 0, l(15.0), 64),
 159             (IS | AB, 'src1_i({})'                      , l(10.0), l(50.0), 64),
 160             (IS | AB, 'src2_i({})'                      , l(20.0), l(50.0), 64),
 161             (IE | AE  , 'cu_busy_o'                       , 0 ),
 162             (IE | AE  , 'cr_a_ok'                         , 0 ),
 163             (IE | AE  , 'dest4_o'                         , 0 ),
 164             (IE | AE  , 'o_ok'                            , 0 ),
 165             (IE | AE  , 'xer_ov_ok'                       , 0 ),
 166             (IE | AE  , 'xer_so_ok'                       , 0 ),
 167             (IE | AE  , 'dest3_o({})'                     , 0, l( 20.0),  2),
 168             (IE | AE  , 'dest2_o({})'                     , 0, l( 20.0),  4),
 169             (IE | AE  , 'cu_rd_rel_o({})'                 , 0, l( 20.0),  3),
 170             (IE | AE  , 'cu_wr_rel_o({})'                 , 0, l( 20.0),  4),
 171             (IN | AE  , 'dest1_o({})'                     , 0, l( 30.0), 64),
 172              ]
 173         mul0 = af.getCell( 'mul0', CRL.Catalog.State.Views )
 174         blockMul0 = Block.create ( mul0 , ioPins=mulp)
 175         blockMul0.state.cfg.etesian.uniformDensity = True
 176         blockMul0.state.cfg.etesian.spaceMargin    = 0.10
 177         blockMul0.state.cfg.katana.searchHalo      = 1
 178         blockMul0.state.fixedHeight = l(5000)
 179         blockMul0.state.useSpares   = False
 180        #rvalue = blockMul0.build()
 181
 182         branchp=[
 183           (IN, 'clk'                                , l( 805.0) ),
 184           (IW , 'cu_issue_i'                         , l(  30.0) ),
 185           (IW , 'oper_i_alu_branch0_imm_data_imm_ok' , l(  40.0) ),
 186           (IW , 'oper_i_alu_branch0_is_32bit'        , l(  70.0) ),
 187           (IW , 'oper_i_alu_branch0_lk'              , l( 150.0) ),
 188           (IW , 'rst'                                , l( 160.0) ),
 189           (IW , 'src3_i({})'                         , l( 180.0), l( 10.0),  4),
 190           (IW , 'cu_rd_go_i({})'                     , l( 270.0), l( 10.0),  3),
 191           (IW , 'cu_rdmaskn_i({})'                   , l( 310.0), l( 10.0),  3),
 192           (IW , 'cu_wr_go_i({})'                     , l( 350.0), l( 10.0),  3),
 193           (IW , 'oper_i_alu_branch0_insn_type({})'   , l( 400.0), l( 10.0),  7),
 194           (IW , 'oper_i_alu_branch0_fn_unit({})'     , l( 470.0), l( 10.0), 11),
 195           (IW , 'oper_i_alu_branch0_insn({})'        , l( 580.0), l( 10.0), 32),
 196           (IW , 'oper_i_alu_branch0_imm_data_imm({})', l( 900.0), l( 10.0), 64),
 197           (IW , 'oper_i_alu_branch0_cia({})'         , l(1540.0), l( 10.0), 64),
 198           (IS, 'src1_i({})'                         , l(  10.0), l( 20.0), 64),
 199           (IS, 'src2_i({})'                         , l(  15.0), l( 20.0), 64),
 200           (IE , 'cu_busy_o'                          , l(3500.0) ),
 201           (IE , 'fast1_ok'                           , l(3520.0) ),
 202           (IE , 'fast2_ok'                           , l(3540.0) ),
 203           (IE , 'nia_ok'                             , l(3560.0) ),
 204           (IE , 'dest2_o({})'                        , l(3580.0), l( 10.0), 64),
 205           (IE , 'dest3_o({})'                        , l(4220.0), l( 10.0), 64),
 206           (IE , 'cu_rd_rel_o({})'                    , l(4860.0), l( 20.0),  3),
 207           (IE , 'cu_wr_rel_o({})'                    , l(4920.0), l( 20.0),  3),
 208           (IN, 'dest1_o({})'                        , l( 500.0), l( 10.0), 64),
 209          ]
 210         branch0 = af.getCell( 'branch0', CRL.Catalog.State.Views )
 211         blockBranch0 = Block.create ( branch0 , ioPins=branchp)
 212         blockBranch0.state.cfg.etesian.spaceMargin = 0.07
 213         blockBranch0.state.fixedHeight = l(5000)
 214         blockBranch0.state.useSpares   = False
 215        #rvalue = blockBranch0.build()
 216
 217         cr0 = af.getCell( 'cr0', CRL.Catalog.State.Views )
 218         blockCr0 = Block.create \
 219             ( cr0
 220             , ioPins=[
 221      (IN, 'clk'                                , l( 805.0) )
 222      , (IW , 'cu_issue_i'                         , l(  30.0) )
 223      , (IW , 'oper_i_alu_cr0_read_cr_whole'       , l(  40.0) )
 224      , (IW , 'oper_i_alu_cr0_write_cr_whole'      , l(  70.0) )
 225      , (IW , 'rst'                                , l( 160.0) )
 226      , (IW , 'src4_i({})'                         , l( 180.0), l( 10.0),  4)
 227      , (IW , 'src5_i({})'                         , l( 220.0), l( 10.0),  4)
 228      , (IW , 'src6_i({})'                         , l( 260.0), l( 10.0),  4)
 229      , (IW , 'cu_rd_go_i({})'                     , l( 300.0), l( 10.0),  6)
 230      , (IW , 'cu_rdmaskn_i({})'                   , l( 360.0), l( 10.0),  6)
 231      , (IW , 'cu_wr_go_i({})'                     , l( 420.0), l( 10.0),  3)
 232      , (IW , 'oper_i_alu_cr0_insn_type({})'       , l( 450.0), l( 10.0),  7)
 233      , (IW , 'oper_i_alu_cr0_fn_unit({})'         , l( 520.0), l( 10.0), 11)
 234      , (IW , 'oper_i_alu_cr0_insn({})'            , l( 630.0), l( 10.0), 32)
 235      , (IS, 'src1_i({})'                         , l(  10.0), l( 10.0), 64)
 236      , (IS, 'src2_i({})'                         , l(  15.0), l( 10.0), 64)
 237      , (IE , 'src3_i({})'                         , l(  10.0), l( 20.0), 32)
 238      , (IE , 'cu_busy_o'                          , l(4320.0) )
 239      , (IE , 'cr_a_ok'                            , l(4340.0) )
 240      , (IE , 'full_cr_ok'                         , l(4360.0) )
 241      , (IE , 'o_ok'                               , l(4380.0) )
 242      , (IE , 'dest2_o({})'                        , l(4400.0), l( 10.0), 32)
 243      , (IE , 'dest3_o({})'                        , l(4720.0), l( 10.0),  4)
 244      , (IE , 'cu_rd_rel_o({})'                    , l(4800.0), l( 20.0),  6)
 245      , (IE , 'cu_wr_rel_o({})'                    , l(4920.0), l( 20.0),  3)
 246      , (IN, 'dest1_o({})'                        , l( 100.0), l( 10.0), 64)
 247                      ]
 248             )
 249         blockCr0.state.cfg.etesian.spaceMargin = 0.10
 250         blockCr0.state.fixedHeight = l(5000)
 251         blockCr0.state.useSpares   = False
 252        #rvalue = blockCr0.build()
 253
 254         ldst0 = af.getCell( 'ldst0', CRL.Catalog.State.Views )
 255         blockLdst0 = Block.create \
 256             ( ldst0
 257             , ioPins=[
 258          (IN              , 'clk'                                , l(805.0) )
 259          , (IW | AB, 'cu_ad_go_i'                         , 0, l(20),  1)
 260          , (IW | AB, 'cu_issue_i'                         , 0, l(20),  1)
 261          , (IW | AB, 'ldst_port0_addr_exc_o'              , 0, l(20),  1)
 262          , (IW | AB, 'ldst_port0_addr_ok_o'               , 0, l(20),  1)
 263          , (IW | AB, 'ldst_port0_ld_data_o_ok'            , 0, l(20),  1)
 264          , (IW | AB, 'oper_i_ldst_ldst0_byte_reverse'     , 0, l(20),  1)
 265          , (IW | AB, 'oper_i_ldst_ldst0_imm_data_imm_ok'  , 0, l(20),  1)
 266          , (IW | AB, 'oper_i_ldst_ldst0_is_32bit'         , 0, l(20),  1)
 267          , (IW | AB, 'oper_i_ldst_ldst0_is_signed'        , 0, l(20),  1)
 268          , (IW | AB, 'oper_i_ldst_ldst0_oe_oe'            , 0, l(20),  1)
 269          , (IW | AB, 'oper_i_ldst_ldst0_oe_oe_ok'         , 0, l(20),  1)
 270          , (IW | AB, 'oper_i_ldst_ldst0_rc_rc'            , 0, l(20),  1)
 271          , (IW | AB, 'oper_i_ldst_ldst0_rc_rc_ok'         , 0, l(20),  1)
 272          , (IW | AB, 'oper_i_ldst_ldst0_sign_extend'      , 0, l(20),  1)
 273          , (IW | AB, 'oper_i_ldst_ldst0_zero_a'           , 0, l(20),  1)
 274          , (IW | AB, 'rst'                                , 0, l(20),  1)
 275          , (IW | AB, 'cu_st_go_i'                         , 0, l(20),  1)
 276          , (IW | AB, 'oper_i_ldst_ldst0_ldst_mode({})'    , 0, l(20),  2)
 277          , (IW | AB, 'cu_rd_go_i({})'                     , 0, l(20),  3)
 278          , (IW | AB, 'cu_rdmaskn_i({})'                   , 0, l(20),  3)
 279          , (IW | AB, 'cu_wr_go_i({})'                     , 0, l(20),  2)
 280          , (IW | AB, 'oper_i_ldst_ldst0_data_len({})'     , 0, l(20),  4)
 281          , (IW | AB, 'oper_i_ldst_ldst0_insn_type({})'    , 0, l(20),  7)
 282          , (IW | AB, 'ldst_port0_ld_data_o({})'           , 0, l(20), 64)
 283          , (IW | AB, 'oper_i_ldst_ldst0_imm_data_imm({})' , 0, l(20), 64)
 284          , (IS | AB, 'src1_i({})'                         , 0, l(10), 64)
 285          , (IS | AB, 'src2_i({})'                         , 0,  l(5), 64)
 286          , (IE | AE  , 'src3_i({})'                         , 0,     0, 64)
 287          , (IE | AE  , 'cu_busy_o'                          , 0, l(20),  1)
 288          , (IE | AE  , 'cu_ad_rel_o'                        , 0, l(20),  1)
 289          , (IE | AE  , 'ldst_port0_addr_i_ok'               , 0, l(20),  1)
 290          , (IE | AE  , 'ldst_port0_is_ld_i'                 , 0, l(20),  1)
 291          , (IE | AE  , 'ldst_port0_is_st_i'                 , 0, l(20),  1)
 292          , (IE | AE  , 'load_mem_o'                         , 0, l(20),  1)
 293          , (IE | AE  , 'cu_st_rel_o'                        , 0, l(20),  1)
 294          , (IE | AE  , 'stwd_mem_o'                         , 0, l(20),  1)
 295          , (IE | AE  , 'ea({})'                             , 0, l(20), 64)
 296          , (IE | AE  , 'ldst_port0_st_data_i({})'           , 0, l(20), 64)
 297          , (IE | AE  , 'cu_rd_rel_o({})'                    , 0,    0,   3)
 298          , (IE | AE  , 'cu_wr_rel_o({})'                    , 0,    0,   2)
 299          , (IE | AE  , 'ldst_port0_addr_i_95'               , 0, l(20),  1)
 300          , (IE | AE  , 'ldst_port0_addr_i_{}'               , 0, l(20), 64)
 301          , (IN | AE  , 'o({})'                              , 0,     0, 64)
 302                      ]
 303             )
 304         blockLdst0.state.cfg.etesian.uniformDensity      = True
 305         blockLdst0.state.cfg.etesian.spaceMargin         = 0.20
 306         blockLdst0.state.cfg.katana.searchHalo           = 1
 307         blockLdst0.state.cfg.katana.hTracksReservedLocal = 10
 308         blockLdst0.state.cfg.katana.vTracksReservedLocal = 10
 309         blockLdst0.state.fixedHeight = l(5000)
 310         blockLdst0.state.useSpares   = False
 311        #rvalue = blockLdst0.build()
 312
 313         logical0 = af.getCell( 'logical0', CRL.Catalog.State.Views )
 314         blockLogical0 = Block.create \
 315             ( logical0
 316             , ioPins=[
 317      (IN              , 'clk'                                 , l(805.0) )
 318      , (IW | AB, 'cu_issue_i'                          , 0, l(20),  1)
 319      , (IW | AB, 'oper_i_alu_logical0_imm_data_imm_ok' , 0, l(20),  1)
 320      , (IW | AB, 'oper_i_alu_logical0_invert_a'        , 0, l(20),  1)
 321      , (IW | AB, 'oper_i_alu_logical0_invert_out'      , 0, l(20),  1)
 322      , (IW | AB, 'oper_i_alu_logical0_is_32bit'        , 0, l(20),  1)
 323      , (IW | AB, 'oper_i_alu_logical0_is_signed'       , 0, l(20),  1)
 324      , (IW | AB, 'oper_i_alu_logical0_oe_oe'           , 0, l(20),  1)
 325      , (IW | AB, 'oper_i_alu_logical0_oe_oe_ok'        , 0, l(20),  1)
 326      , (IW | AB, 'oper_i_alu_logical0_output_carry'    , 0, l(20),  1)
 327      , (IW | AB, 'oper_i_alu_logical0_rc_rc'           , 0, l(20),  1)
 328      , (IW | AB, 'oper_i_alu_logical0_rc_rc_ok'        , 0, l(20),  1)
 329      , (IW | AB, 'oper_i_alu_logical0_write_cr0'       , 0, l(20),  1)
 330      , (IW | AB, 'oper_i_alu_logical0_zero_a'          , 0, l(20),  1)
 331      , (IW | AB, 'rst'                                 , 0, l(20),  1)
 332      , (IW | AB, 'oper_i_alu_logical0_input_carry({})' , 0, l(20),  2)
 333      , (IW | AB, 'cu_rd_go_i({})'                      , 0, l(20),  2)
 334      , (IW | AB, 'cu_rdmaskn_i({})'                    , 0, l(20),  2)
 335      , (IW | AB, 'cu_wr_go_i({})'                      , 0, l(20),  3)
 336      , (IW | AB, 'oper_i_alu_logical0_data_len({})'    , 0, l(20),  4)
 337      , (IW | AB, 'oper_i_alu_logical0_insn_type({})'   , 0, l(20),  7)
 338      , (IW | AB, 'oper_i_alu_logical0_fn_unit({})'     , 0, l(20), 11)
 339      , (IW | AB, 'oper_i_alu_logical0_insn({})'        , 0, l(20), 32)
 340      , (IW | AB, 'oper_i_alu_logical0_imm_data_imm({})', 0, l(20), 64)
 341      , (IS | AB, 'src1_i({})'                          , 0, l(10), 64)
 342      , (IS | AB, 'src2_i({})'                          , 0,  l(5), 64)
 343      , (IE | AE  , 'cu_busy_o'                           , 0, l(20),  1)
 344      , (IE | AE  , 'cr_a_ok'                             , 0, l(20),  1)
 345      , (IE | AE  , 'o_ok'                                , 0, l(20),  1)
 346      , (IE | AE  , 'xer_ca_ok'                           , 0, l(20),  1)
 347      , (IE | AE  , 'cu_rd_rel_o({})'                     , 0,     0,  2)
 348      , (IE | AE  , 'cu_wr_rel_o({})'                     , 0,     0,  3)
 349      , (IN | AE  , 'dest3_o({})'                         , 0,     0,  2)
 350      , (IN | AE  , 'dest2_o({})'                         , 0,     0,  4)
 351      , (IN | AE  , 'dest1_o({})'                         , 0,     0, 64)
 352                      ]
 353             )
 354         blockLogical0.state.cfg.etesian.uniformDensity = True
 355         blockLogical0.state.cfg.etesian.spaceMargin    = 0.07
 356         blockLogical0.state.cfg.katana.searchHalo      = 1
 357         blockLogical0.state.fixedHeight = l(5000)
 358         blockLogical0.state.useSpares   = False
 359        #rvalue = blockLogical0.build()
 360
 361         shiftrot0 = af.getCell( 'shiftrot0', CRL.Catalog.State.Views )
 362         blockShiftrot0 = Block.create \
 363             ( shiftrot0
 364             , ioPins=[
 365     (IN              , 'clk'                                   , l(805.0) )
 366      , (IW | AB, 'cu_issue_i'                               , 0, l(20),  1)
 367      , (IW | AB, 'oper_i_alu_shift_rot0_imm_data_imm_ok' , 0, l(20),  1)
 368      , (IW | AB, 'oper_i_alu_shift_rot0_input_cr'        , 0, l(20),  1)
 369      , (IW | AB, 'oper_i_alu_shift_rot0_is_32bit'        , 0, l(20),  1)
 370      , (IW | AB, 'oper_i_alu_shift_rot0_is_signed'       , 0, l(20),  1)
 371      , (IW | AB, 'oper_i_alu_shift_rot0_oe_oe'           , 0, l(20),  1)
 372      , (IW | AB, 'oper_i_alu_shift_rot0_oe_oe_ok'        , 0, l(20),  1)
 373      , (IW | AB, 'oper_i_alu_shift_rot0_output_carry'    , 0, l(20),  1)
 374      , (IW | AB, 'oper_i_alu_shift_rot0_output_cr'       , 0, l(20),  1)
 375      , (IW | AB, 'oper_i_alu_shift_rot0_rc_rc'           , 0, l(20),  1)
 376      , (IW | AB, 'oper_i_alu_shift_rot0_rc_rc_ok'        , 0, l(20),  1)
 377      , (IW | AB, 'rst'                                   , 0, l(20),  1)
 378      , (IW | AB, 'oper_i_alu_shift_rot0_input_carry({})' , 0, l(20),  2)
 379      , (IW | AB, 'src4_i({})'                            , 0, l(10),  2)
 380      , (IW | AB, 'cu_rd_go_i({})'                             , 0, l(20),  4)
 381      , (IW | AB, 'cu_rdmaskn_i({})'                           , 0, l(20),  4)
 382      , (IW | AB, 'cu_wr_go_i({})'                             , 0, l(20),  3)
 383      , (IW | AB, 'oper_i_alu_shift_rot0_insn_type({})'   , 0, l(20),  7)
 384      , (IW | AB, 'oper_i_alu_shift_rot0_fn_unit({})'     , 0, l(20), 11)
 385      , (IW | AB, 'oper_i_alu_shift_rot0_insn({})'        , 0, l(20), 32)
 386      , (IW | AB, 'oper_i_alu_shift_rot0_imm_data_imm({})', 0, l(20), 64)
 387      , (IW | AB, 'src3_i({})'                            , 0, l(10), 64)
 388      , (IS | AB, 'src1_i({})'                            , 0, l(10), 64)
 389      , (IS | AB, 'src2_i({})'                            , 0,  l(5), 64)
 390      , (IE | AE  , 'cu_busy_o'                                , 0, l(20),  1)
 391      , (IE | AE  , 'cr_a_ok'                               , 0, l(20),  1)
 392      , (IE | AE  , 'o_ok'                                  , 0, l(20),  1)
 393      , (IE | AE  , 'xer_ca_ok'                             , 0, l(20),  1)
 394      , (IE | AE  , 'cu_rd_rel_o({})'                            , 0,     0,  4)
 395      , (IE | AE  , 'cu_wr_rel_o({})'                            , 0,     0,  3)
 396      , (IN | AE  , 'dest3_o({})'                           , 0,     0,  2)
 397      , (IN | AE  , 'dest2_o({})'                           , 0,     0,  4)
 398      , (IN | AE  , 'dest1_o({})'                           , 0,     0, 64)
 399                      ]
 400             )
 401         blockShiftrot0.state.cfg.etesian.uniformDensity = True
 402         blockShiftrot0.state.cfg.etesian.spaceMargin    = 0.7
 403         blockShiftrot0.state.cfg.katana.searchHalo      = 1
 404         blockShiftrot0.state.fixedHeight = l(5000)
 405         blockShiftrot0.state.useSpares   = False
 406        #rvalue = blockShiftrot0.build()
 407
 408         spr0 = af.getCell( 'spr0', CRL.Catalog.State.Views )
 409         blockSpr0 = Block.create \
 410             ( spr0
 411             , ioPins=[
 412             (IN              , 'clk'                          , l(805.0) )
 413             , (IW | AB, 'cu_issue_i'                   , 0, l(20),  1)
 414             , (IW | AB, 'oper_i_alu_spr0_is_32bit'     , 0, l(20),  1)
 415             , (IW | AB, 'rst'                          , 0, l(20),  1)
 416             , (IW | AB, 'src4_i'                       , 0, l(10),  1)
 417             , (IW | AB, 'src5_i({})'                   , 0, l(10),  2)
 418             , (IW | AB, 'src6_i({})'                   , 0, l(10),  2)
 419             , (IW | AB, 'cu_rd_go_i({})'               , 0, l(20),  6)
 420             , (IW | AB, 'cu_rdmaskn_i({})'             , 0, l(20),  6)
 421             , (IW | AB, 'cu_wr_go_i({})'               , 0, l(20),  6)
 422             , (IW | AB, 'oper_i_alu_spr0_insn_type({})', 0, l(20),  7)
 423             , (IW | AB, 'oper_i_alu_spr0_fn_unit({})'  , 0, l(20), 11)
 424             , (IW | AB, 'oper_i_alu_spr0_insn({})'     , 0, l(20), 32)
 425             , (IW | AB, 'src3_i({})'                   , 0, l(10), 64)
 426             , (IS | AB, 'src1_i({})'                   , 0, l(10), 64)
 427             , (IS | AB, 'src2_i({})'                   , 0,  l(5), 64)
 428             , (IE | AE  , 'cu_busy_o'                    , 0, l(20),  1)
 429             , (IE | AE  , 'dest4_o'                      , 0, l(20),  1)
 430             , (IE | AE  , 'fast1_ok'                     , 0, l(20),  1)
 431             , (IE | AE  , 'o_ok'                         , 0, l(20),  1)
 432             , (IE | AE  , 'spr1_ok'                      , 0, l(20),  1)
 433             , (IE | AE  , 'xer_ca_ok'                    , 0, l(20),  1)
 434             , (IE | AE  , 'xer_ov_ok'                    , 0, l(20),  1)
 435             , (IE | AE  , 'xer_so_ok'                    , 0, l(20),  1)
 436             , (IE | AE  , 'cu_rd_rel_o({})'              , 0,     0,  6)
 437             , (IE | AE  , 'cu_wr_rel_o({})'              , 0,     0,  6)
 438             , (IN | AE  , 'dest5_o({})'                  , 0,     0,  2)
 439             , (IN | AE  , 'dest6_o({})'                  , 0,     0,  2)
 440             , (IE | AE  , 'dest3_o({})'                  , 0, l(20), 64)
 441             , (IE | AE  , 'dest2_o({})'                  , 0, l(20), 64)
 442             , (IE | AE  , 'dest1_o({})'                  , 0, l(20), 64)
 443                      ]
 444             )
 445         blockSpr0.state.cfg.etesian.uniformDensity = True
 446         blockSpr0.state.cfg.etesian.spaceMargin    = 0.5
 447         blockSpr0.state.cfg.katana.searchHalo      = 1
 448         blockSpr0.state.fixedHeight = l(5000)
 449         blockSpr0.state.useSpares   = False
 450        #rvalue = blockSpr0.build()
 451
 452         trap0 = af.getCell( 'trap0', CRL.Catalog.State.Views )
 453         blockTrap0 = Block.create \
 454             ( trap0
 455             , ioPins=[
 456          (IN              , 'clk'                           , l(805.0) )
 457          , (IW | AB, 'cu_issue_i'                    , 0, l(20),  1)
 458          , (IW | AB, 'oper_i_alu_trap0_is_32bit'     , 0, l(20),  1)
 459          , (IW | AB, 'rst'                           , 0, l(20),  1)
 460          , (IW | AB, 'cu_rd_go_i({})'                , 0, l(20),  4)
 461          , (IW | AB, 'cu_rdmaskn_i({})'              , 0, l(20),  4)
 462          , (IW | AB, 'cu_wr_go_i({})'                , 0, l(20),  5)
 463          , (IW | AB, 'oper_i_alu_trap0_traptype({})' , 0, l(20),  5)
 464          , (IW | AB, 'oper_i_alu_trap0_insn_type({})', 0, l(20),  7)
 465          , (IW | AB, 'oper_i_alu_trap0_fn_unit({})'  , 0, l(20), 11)
 466          , (IW | AB, 'oper_i_alu_trap0_trapaddr({})' , 0, l(20), 13)
 467          , (IW | AB, 'oper_i_alu_trap0_insn({})'     , 0, l(20), 32)
 468          , (IW | AB, 'oper_i_alu_trap0_cia({})'      , 0, l(20), 64)
 469          , (IW | AB, 'oper_i_alu_trap0_msr({})'      , 0, l(20), 64)
 470          , (IW | AB, 'src3_i({})'                    , 0, l(10), 64)
 471          , (IS | AB, 'src4_i({})'                    , 0, l(10), 64)
 472          , (IS | AB, 'src1_i({})'                    , 0, l(10), 64)
 473          , (IS | AB, 'src2_i({})'                    , 0,  l(5), 64)
 474          , (IE | AE  , 'cu_busy_o'                     , 0, l(20),  1)
 475          , (IE | AE  , 'fast1_ok'                      , 0, l(20),  1)
 476          , (IE | AE  , 'fast2_ok'                      , 0, l(20),  1)
 477          , (IE | AE  , 'msr_ok'                        , 0, l(20),  1)
 478          , (IE | AE  , 'nia_ok'                        , 0, l(20),  1)
 479          , (IE | AE  , 'o_ok'                          , 0, l(20),  1)
 480          , (IE | AE  , 'cu_rd_rel_o({})'               , 0,     0,  4)
 481          , (IE | AE  , 'cu_wr_rel_o({})'               , 0,     0,  5)
 482          , (IN | AE  , 'dest5_o({})'                   , 0, l(10), 64)
 483          , (IN | AE  , 'dest4_o({})'                   , 0, l(10), 64)
 484          , (IE | AE  , 'dest3_o({})'                   , 0, l(10), 64)
 485          , (IE | AE  , 'dest2_o({})'                   , 0, l(10), 64)
 486          , (IE | AE  , 'dest1_o({})'                   , 0, l(10), 64)
 487                      ]
 488             )
 489         blockTrap0.state.cfg.etesian.uniformDensity = True
 490         blockTrap0.state.cfg.etesian.spaceMargin    = 0.5
 491         blockTrap0.state.cfg.katana.searchHalo      = 1
 492         blockTrap0.state.fixedHeight = l(5000)
 493         blockTrap0.state.useSpares   = False
 494        #rvalue = blockTrap0.build()
 495
 496         fast = af.getCell( 'fast', CRL.Catalog.State.Views )
 497         blockFast = Block.create \
 498             ( fast
 499             , ioPins=[ (IN              , 'clk'             , l(805.0) )
 500                      , (IW | AB, 'rst'             , 0, l(20),  1)
 501                      , (IW | AB, 'cia_ren({})'     , 0, l(20),  8)
 502                      , (IW | AB, 'fast_nia_wen({})', 0, l(20),  8)
 503                      , (IW | AB, 'msr_ren({})'     , 0, l(20),  8)
 504                      , (IW | AB, 'src1_ren({})'    , 0, l(20),  8)
 505                      , (IW | AB, 'src2_ren({})'    , 0, l(20),  8)
 506                      , (IW | AB, 'wen({})'         , 0, l(20),  8)
 507                      , (IW | AB, 'wen_1({})'       , 0, l(20),  8)
 508                      , (IW | AB, 'wen_3({})'       , 0, l(20),  8)
 509                      , (IW | AB, 'wen_6({})'       , 0, l(20),  8)
 510                      , (IS | AB, 'data_i({})'      , 0, l(20), 64)
 511                      , (IS | AB, 'data_i_2({})'    , 0, l(20), 64)
 512                      , (IS | AB, 'data_i_4({})'    , 0, l(10), 64)
 513                      , (IS | AB, 'data_i_5({})'    , 0, l(10), 64)
 514                      , (IS | AB, 'data_i_7({})'    , 0, l(10), 64)
 515                      , (IN | AE  , 'cia_data_o({})'  , 0, l(20), 64)
 516                      , (IN | AE  , 'msr_data_o({})'  , 0, l(10), 64)
 517                      , (IN | AE  , 'src1_data_o({})' , 0, l(10), 64)
 518                      , (IN | AE  , 'src2_data_o({})' , 0, l(10), 64)
 519                      ]
 520             )
 521         blockFast.state.cfg.etesian.uniformDensity = True
 522         blockFast.state.cfg.etesian.aspectRatio    = 1.0
 523         blockFast.state.cfg.etesian.spaceMargin    = 0.6
 524         blockFast.state.cfg.katana.searchHalo      = 1
 525         blockFast.state.useSpares   = False
 526        #rvalue = blockFast.build()
 527
 528         cellInt  = af.getCell( 'int', CRL.Catalog.State.Views )
 529         blockInt = Block.create \
 530             ( cellInt
 531             , ioPins=[ (IN              , 'clk'             , l(805.0) )
 532                      , (IW | AB, 'rst'             , 0, l(20),  1)
 533                      , (IW | AB, 'wen({})'         , 0, l(20), 32)
 534                      , (IW | AB, 'wen_1({})'       , 0, l(20), 32)
 535                      , (IW | AB, 'src1_ren({})'    , 0, l(20), 32)
 536                      , (IW | AB, 'src2_ren({})'    , 0, l(20), 32)
 537                      , (IW | AB, 'src3_ren({})'    , 0, l(20), 32)
 538                      , (IS | AB, 'data_i({})'      , 0, l(20), 64)
 539                      , (IS | AB, 'data_i_2({})'    , 0, l(20), 64)
 540                      , (IN | AE  , 'src1_data_o({})' , 0, l(10), 64)
 541                      , (IN | AE  , 'src2_data_o({})' , 0, l(10), 64)
 542                      , (IN | AE  , 'src3_data_o({})' , 0, l(10), 64)
 543                      ]
 544             )
 545         blockInt.state.cfg.etesian.uniformDensity = True
 546         blockInt.state.cfg.etesian.aspectRatio    = 1.0
 547         blockInt.state.cfg.etesian.spaceMargin    = 0.07
 548         blockInt.state.cfg.katana.searchHalo      = 1
 549         blockInt.state.useSpares   = False
 550        #rvalue = blockInt.build()
 551
 552         issuer      = af.getCell( 'test_issuer' , CRL.Catalog.State.Logical )
 553         blockIssuer = Block.create \
 554             ( issuer
 555             , ioPins=[]
 556             )
 557
 558         # Cell width:
 559         #
 560         # ================  =================
 561         # alu0              1200
 562         # branch0           1750
 563         # cr0                950
 564         # ldst0             1100
 565         # logical0          1800
 566         # mul0              9600
 567         # shiftrot0         2350
 568         # spr0              1550
 569         # trap0             3250
 570         # fast              ?
 571         # int               ?
 572         # pdecode           ?
 573         # ================  =================
 574
 575         blockIssuer.useBlockInstance(
 576                     'subckt_1150_core.subckt_2227_fus.subckt_0_alu0',
 577                     Transformation( l(1000), l(4000),
 578                     Transformation.Orientation.ID ))
 579         blockIssuer.useBlockInstance(
 580                     'subckt_1150_core.subckt_2227_fus.subckt_1_branch0',
 581                     Transformation( l(2700), l(4000),
 582                     Transformation.Orientation.ID ))
 583         blockIssuer.useBlockInstance(
 584                     'subckt_1150_core.subckt_2227_fus.subckt_2_cr0' ,
 585                     Transformation( l(4950), l(4000),
 586                     Transformation.Orientation.ID ))
 587         blockIssuer.useBlockInstance(
 588                     'subckt_1150_core.subckt_2227_fus.subckt_3_div0' ,
 589                     Transformation( l(27000), l(4000),
 590                         Transformation.Orientation.ID ))
 591         blockIssuer.useBlockInstance(
 592                     'subckt_1150_core.subckt_2227_fus.subckt_4_ldst0' ,
 593                     Transformation( l(6400), l(4000),
 594                         Transformation.Orientation.ID ))
 595         blockIssuer.useBlockInstance(
 596                     'subckt_1150_core.subckt_2227_fus.subckt_5_logical0' ,
 597                     Transformation( l(8000), l(4000),
 598                         Transformation.Orientation.ID ))
 599         blockIssuer.useBlockInstance(
 600                     'subckt_1150_core.subckt_2227_fus.subckt_6_mul0' ,
 601                     Transformation( l(10300), l(4000),
 602                         Transformation.Orientation.ID ))
 603         blockIssuer.useBlockInstance(
 604                     'subckt_1150_core.subckt_2227_fus.subckt_7_shiftrot0' ,
 605                     Transformation( l(20400), l(4000),
 606                         Transformation.Orientation.ID ))
 607         blockIssuer.useBlockInstance(
 608                     'subckt_1150_core.subckt_2227_fus.subckt_8_spr0' ,
 609                     Transformation( l(23250), l(4000),
 610                         Transformation.Orientation.ID ))
 611         blockIssuer.useBlockInstance(
 612                     'subckt_1150_core.subckt_2227_fus.subckt_0_trap0' ,
 613                     Transformation( l(25300), l(4000),
 614                         Transformation.Orientation.ID ))
 615         blockIssuer.useBlockInstance(
 616                     'subckt_1150_core.subckt_2030_fast' ,
 617                     Transformation( l(1000), l(4000),
 618                         Transformation.Orientation.ID ))
 619         blockIssuer.useBlockInstance(
 620                     'subckt_1150_core.subckt_2032_int' ,
 621                     Transformation( l(1000), l(4000),
 622                         Transformation.Orientation.ID ))
 623         blockIssuer.useBlockInstance(
 624                     'subckt_1150_core.subckt_2034_pdecode2' ,
 625                     Transformation( l(1000), l(4000),
 626                         Transformation.Orientation.ID ))
 627
 628         blockIssuer.state.cfg.etesian.uniformDensity = True
 629         blockIssuer.state.cfg.etesian.aspectRatio    = 1.0
 630         blockIssuer.state.cfg.etesian.spaceMargin    = 0.07
 631         blockIssuer.state.cfg.katana.searchHalo      = 10000
 632         blockIssuer.state.fixedHeight = l(15000)
 633         blockIssuer.state.fixedWidth  = l(31550)
 634         blockIssuer.state.useSpares   = False
 635         blockIssuer.state.editor      = editor
 636         rvalue = blockIssuer.build()
 637     except Exception, e:
 638         helpers.io.catch( e )
 639         rvalue = False
 640
 641     sys.stdout.flush()
 642     sys.stderr.flush()
 643
 644     return rvalue