experiments9/doDesign.py

   1
   2 from   __future__ import print_function
   3 import sys
   4 import traceback
   5 import CRL
   6 import helpers
   7 from   helpers.io import ErrorMessage
   8 from   helpers.io import WarningMessage
   9 from   helpers    import trace, l
  10 import plugins
  11 from   Hurricane  import DbU
  12 from   Hurricane  import Pin
  13 from   Hurricane  import Transformation
  14 from   plugins.alpha.block.block         import Block
  15 from   plugins.alpha.block.configuration import IoPin
  16
  17
  18 af = CRL.AllianceFramework.get()
  19
  20 def find
  21
  22 def scriptMain ( **kw ):
  23     """The mandatory function that Coriolis CGT/Unicorn will look for."""
  24     global af
  25
  26     IW = IoPin.WEST
  27     IE = IoPin.EAST
  28     IS = IoPin.SOUTH
  29     IN = IoPin.NORTH
  30     AB = IoPin.A_BEGIN
  31     AE = IoPin.A_END
  32
  33     alup=[
  34         (IW | AB, 'clk'                             , 0 ),
  35         (IW | AB, 'cu_issue_i'                      , 0 ),
  36         (IW | AB, 'oper_i_alu_alu0_imm_data_imm_ok' , 0 ),
  37         (IW | AB, 'oper_i_alu_alu0_invert_a'        , 0 ),
  38         (IW | AB, 'oper_i_alu_alu0_invert_out'      , 0 ),
  39         (IW | AB, 'oper_i_alu_alu0_is_32bit'        , 0 ),
  40         (IW | AB, 'oper_i_alu_alu0_is_signed'       , 0 ),
  41         (IW | AB, 'oper_i_alu_alu0_oe_oe'           , 0 ),
  42         (IW | AB, 'oper_i_alu_alu0_oe_oe_ok'        , 0 ),
  43         (IW | AB, 'oper_i_alu_alu0_output_carry'    , 0 ),
  44         (IW | AB, 'oper_i_alu_alu0_rc_rc'           , 0 ),
  45         (IW | AB, 'oper_i_alu_alu0_rc_rc_ok'        , 0 ),
  46         (IW | AB, 'oper_i_alu_alu0_write_cr0'       , 0 ),
  47         (IW | AB, 'oper_i_alu_alu0_zero_a'          , 0 ),
  48         (IW | AB, 'rst'                             , 0 ),
  49         (IW | AB, 'src3_i'                          , 0 ),
  50         (IW | AB, 'oper_i_alu_alu0_input_carry({})' , 0, l( 10.0),  2),
  51         (IW | AB, 'src4_i({})'                      , 0, l( 10.0),  2),
  52         (IW | AB, 'oper_i_alu_alu0_data_len({})'    , 0, l( 10.0),  4),
  53         (IW | AB, 'cu_rd_go_i({})'                  , 0, l( 10.0),  4),
  54         (IW | AB, 'cu_rdmaskn_i({})'                , 0, l( 10.0),  4),
  55         (IW | AB, 'cu_wr_go_i({})'                  , 0, l( 10.0),  5),
  56         (IW | AB, 'oper_i_alu_alu0_insn_type({})'   , 0, l( 10.0),  7),
  57         (IW | AB, 'oper_i_alu_alu0_fn_unit({})'     , 0, l( 10.0), 11),
  58         (IW | AB, 'oper_i_alu_alu0_insn({})'        , 0, l( 10.0), 32),
  59         (IW | AB, 'oper_i_alu_alu0_imm_data_imm({})', 0, l( 15.0), 64),
  60         (IS    , 'src1_i({})'                      , l(10), l( 15.0), 64),
  61         (IS    , 'src2_i({})'                      , l(15), l( 15.0), 64),
  62         (IN    , 'dest1_o({})'                     , l(20), l( 15.0), 64),
  63         (IE | AE  , 'cu_busy_o'                       , 0 ),
  64         (IE | AE  , 'cr_a_ok'                         , 0 ),
  65         (IE | AE  , 'dest5_o'                         , 0 ),
  66         (IE | AE  , 'o_ok'                            , 0 ),
  67         (IE | AE  , 'xer_ca_ok'                       , 0 ),
  68         (IE | AE  , 'xer_ov_ok'                       , 0 ),
  69         (IE | AE  , 'xer_so_ok'                       , 0 ),
  70         (IE | AE  , 'dest3_o({})'                     , 0, l( 20.0),  2),
  71         (IE | AE  , 'dest4_o({})'                     , 0, l( 20.0),  2),
  72         (IE | AE  , 'dest2_o({})'                     , 0, l( 20.0),  4),
  73         (IE | AE  , 'cu_rd_rel_o({})'                 , 0, l( 20.0),  4),
  74         (IE | AE  , 'cu_wr_rel_o({})'                 , 0, l( 20.0),  5),
  75         ]
  76
  77     rvalue = True
  78     try:
  79         helpers.setTraceLevel( 550 )
  80         cell, editor = plugins.kwParseMain( **kw )
  81
  82         alu0 = af.getCell( 'alu0', CRL.Catalog.State.Views )
  83         blockAlu0 = Block.create (alu0, ioPins = alup)
  84         blockAlu0.state.cfg.etesian.spaceMargin = 0.05
  85         blockAlu0.state.fixedHeight = l(5000)
  86         blockAlu0.state.useSpares   = False
  87        #rvalue = blockAlu0.build()
  88
  89         divp=[
  90             (IN     , 'clk'                             , l(4500.0) ),
  91             (IW | AB, 'cu_issue_i'                      , 0, l(20) ),
  92             (IW | AB, 'oper_i_alu_div0_imm_data_imm_ok' , 0, l(20) ),
  93             (IW | AB, 'oper_i_alu_div0_invert_a'        , 0, l(20) ),
  94             (IW | AB, 'oper_i_alu_div0_invert_out'      , 0, l(20) ),
  95             (IW | AB, 'oper_i_alu_div0_is_32bit'        , 0, l(20) ),
  96             (IW | AB, 'oper_i_alu_div0_is_signed'       , 0, l(20) ),
  97             (IW | AB, 'oper_i_alu_div0_oe_oe'           , 0, l(20) ),
  98             (IW | AB, 'oper_i_alu_div0_oe_oe_ok'        , 0, l(20) ),
  99             (IW | AB, 'oper_i_alu_div0_rc_rc'           , 0, l(20) ),
 100             (IW | AB, 'oper_i_alu_div0_rc_rc_ok'        , 0, l(20) ),
 101             (IW | AB, 'oper_i_alu_div0_write_cr0'       , 0, l(20) ),
 102             (IW | AB, 'oper_i_alu_div0_zero_a'          , 0, l(20) ),
 103             (IW | AB, 'rst'                             , 0, l(20) ),
 104             (IW | AB, 'src3_i'                          , 0, l(20) ),
 105             (IW | AB, 'cu_rd_go_i({})'                  , 0, l(10.0),  3),
 106             (IW | AB, 'cu_rdmaskn_i({})'                , 0, l(10.0),  3),
 107             (IW | AB, 'cu_wr_go_i({})'                  , 0, l(10.0),  4),
 108             (IW | AB, 'oper_i_alu_div0_insn_type({})'   , 0, l(10.0),  7),
 109             (IW | AB, 'oper_i_alu_div0_fn_unit({})'     , 0, l(10.0), 11),
 110             (IW | AB, 'oper_i_alu_div0_insn({})'        , 0, l(10.0), 32),
 111             (IW | AB, 'oper_i_alu_div0_imm_data_imm({})', 0, l(15.0), 64),
 112             (IS | AB, 'src1_i({})'                      , l(10.0), l(50.0), 64),
 113             (IS | AB, 'src2_i({})'                      , l(20.0), l(50.0), 64),
 114             (IE | AE  , 'cu_busy_o'                       , 0 ),
 115             (IE | AE  , 'cr_a_ok'                         , 0 ),
 116             (IE | AE  , 'dest4_o'                         , 0 ),
 117             (IE | AE  , 'o_ok'                            , 0 ),
 118             (IE | AE  , 'xer_ov_ok'                       , 0 ),
 119             (IE | AE  , 'xer_so_ok'                       , 0 ),
 120             (IE | AE  , 'dest3_o({})'                     , 0, l( 20.0),  2),
 121             (IE | AE  , 'dest2_o({})'                     , 0, l( 20.0),  4),
 122             (IE | AE  , 'cu_rd_rel_o({})'                 , 0, l( 20.0),  3),
 123             (IE | AE  , 'cu_wr_rel_o({})'                 , 0, l( 20.0),  4),
 124             (IN | AE  , 'dest1_o({})'                     , 0, l( 30.0), 64),
 125              ]
 126         div0 = af.getCell( 'div0', CRL.Catalog.State.Views )
 127         blockDiv0 = Block.create ( div0 , ioPins=divp)
 128         blockDiv0.state.cfg.etesian.uniformDensity = True
 129         blockDiv0.state.cfg.etesian.spaceMargin    = 0.10
 130         blockDiv0.state.cfg.katana.searchHalo      = 1
 131         blockDiv0.state.fixedHeight = l(5000)
 132         blockDiv0.state.useSpares   = False
 133        #rvalue = blockDiv0.build()
 134
 135         mulp=[
 136             (IN     , 'clk'                             , l(4500.0) ),
 137             (IW | AB, 'cu_issue_i'                      , 0, l(20) ),
 138             (IW | AB, 'oper_i_alu_mul0_imm_data_imm_ok' , 0, l(20) ),
 139             (IW | AB, 'oper_i_alu_mul0_invert_a'        , 0, l(20) ),
 140             (IW | AB, 'oper_i_alu_mul0_invert_out'      , 0, l(20) ),
 141             (IW | AB, 'oper_i_alu_mul0_is_32bit'        , 0, l(20) ),
 142             (IW | AB, 'oper_i_alu_mul0_is_signed'       , 0, l(20) ),
 143             (IW | AB, 'oper_i_alu_mul0_oe_oe'           , 0, l(20) ),
 144             (IW | AB, 'oper_i_alu_mul0_oe_oe_ok'        , 0, l(20) ),
 145             (IW | AB, 'oper_i_alu_mul0_rc_rc'           , 0, l(20) ),
 146             (IW | AB, 'oper_i_alu_mul0_rc_rc_ok'        , 0, l(20) ),
 147             (IW | AB, 'oper_i_alu_mul0_write_cr0'       , 0, l(20) ),
 148             (IW | AB, 'oper_i_alu_mul0_zero_a'          , 0, l(20) ),
 149             (IW | AB, 'rst'                             , 0, l(20) ),
 150             (IW | AB, 'src3_i'                          , 0, l(20) ),
 151             (IW | AB, 'cu_rd_go_i({})'                  , 0, l(10.0),  3),
 152             (IW | AB, 'cu_rdmaskn_i({})'                , 0, l(10.0),  3),
 153             (IW | AB, 'cu_wr_go_i({})'                  , 0, l(10.0),  4),
 154             (IW | AB, 'oper_i_alu_mul0_insn_type({})'   , 0, l(10.0),  7),
 155             (IW | AB, 'oper_i_alu_mul0_fn_unit({})'     , 0, l(10.0), 11),
 156             (IW | AB, 'oper_i_alu_mul0_insn({})'        , 0, l(10.0), 32),
 157             (IW | AB, 'oper_i_alu_mul0_imm_data_imm({})', 0, l(15.0), 64),
 158             (IS | AB, 'src1_i({})'                      , l(10.0), l(50.0), 64),
 159             (IS | AB, 'src2_i({})'                      , l(20.0), l(50.0), 64),
 160             (IE | AE  , 'cu_busy_o'                       , 0 ),
 161             (IE | AE  , 'cr_a_ok'                         , 0 ),
 162             (IE | AE  , 'dest4_o'                         , 0 ),
 163             (IE | AE  , 'o_ok'                            , 0 ),
 164             (IE | AE  , 'xer_ov_ok'                       , 0 ),
 165             (IE | AE  , 'xer_so_ok'                       , 0 ),
 166             (IE | AE  , 'dest3_o({})'                     , 0, l( 20.0),  2),
 167             (IE | AE  , 'dest2_o({})'                     , 0, l( 20.0),  4),
 168             (IE | AE  , 'cu_rd_rel_o({})'                 , 0, l( 20.0),  3),
 169             (IE | AE  , 'cu_wr_rel_o({})'                 , 0, l( 20.0),  4),
 170             (IN | AE  , 'dest1_o({})'                     , 0, l( 30.0), 64),
 171              ]
 172         mul0 = af.getCell( 'mul0', CRL.Catalog.State.Views )
 173         blockMul0 = Block.create ( mul0 , ioPins=mulp)
 174         blockMul0.state.cfg.etesian.uniformDensity = True
 175         blockMul0.state.cfg.etesian.spaceMargin    = 0.10
 176         blockMul0.state.cfg.katana.searchHalo      = 1
 177         blockMul0.state.fixedHeight = l(5000)
 178         blockMul0.state.useSpares   = False
 179        #rvalue = blockMul0.build()
 180
 181         branchp=[
 182           (IN, 'clk'                                , l( 805.0) ),
 183           (IW , 'cu_issue_i'                         , l(  30.0) ),
 184           (IW , 'oper_i_alu_branch0_imm_data_imm_ok' , l(  40.0) ),
 185           (IW , 'oper_i_alu_branch0_is_32bit'        , l(  70.0) ),
 186           (IW , 'oper_i_alu_branch0_lk'              , l( 150.0) ),
 187           (IW , 'rst'                                , l( 160.0) ),
 188           (IW , 'src3_i({})'                         , l( 180.0), l( 10.0),  4),
 189           (IW , 'cu_rd_go_i({})'                     , l( 270.0), l( 10.0),  3),
 190           (IW , 'cu_rdmaskn_i({})'                   , l( 310.0), l( 10.0),  3),
 191           (IW , 'cu_wr_go_i({})'                     , l( 350.0), l( 10.0),  3),
 192           (IW , 'oper_i_alu_branch0_insn_type({})'   , l( 400.0), l( 10.0),  7),
 193           (IW , 'oper_i_alu_branch0_fn_unit({})'     , l( 470.0), l( 10.0), 11),
 194           (IW , 'oper_i_alu_branch0_insn({})'        , l( 580.0), l( 10.0), 32),
 195           (IW , 'oper_i_alu_branch0_imm_data_imm({})', l( 900.0), l( 10.0), 64),
 196           (IW , 'oper_i_alu_branch0_cia({})'         , l(1540.0), l( 10.0), 64),
 197           (IS, 'src1_i({})'                         , l(  10.0), l( 20.0), 64),
 198           (IS, 'src2_i({})'                         , l(  15.0), l( 20.0), 64),
 199           (IE , 'cu_busy_o'                          , l(3500.0) ),
 200           (IE , 'fast1_ok'                           , l(3520.0) ),
 201           (IE , 'fast2_ok'                           , l(3540.0) ),
 202           (IE , 'nia_ok'                             , l(3560.0) ),
 203           (IE , 'dest2_o({})'                        , l(3580.0), l( 10.0), 64),
 204           (IE , 'dest3_o({})'                        , l(4220.0), l( 10.0), 64),
 205           (IE , 'cu_rd_rel_o({})'                    , l(4860.0), l( 20.0),  3),
 206           (IE , 'cu_wr_rel_o({})'                    , l(4920.0), l( 20.0),  3),
 207           (IN, 'dest1_o({})'                        , l( 500.0), l( 10.0), 64),
 208          ]
 209         branch0 = af.getCell( 'branch0', CRL.Catalog.State.Views )
 210         blockBranch0 = Block.create ( branch0 , ioPins=branchp)
 211         blockBranch0.state.cfg.etesian.spaceMargin = 0.07
 212         blockBranch0.state.fixedHeight = l(5000)
 213         blockBranch0.state.useSpares   = False
 214        #rvalue = blockBranch0.build()
 215
 216         cr0 = af.getCell( 'cr0', CRL.Catalog.State.Views )
 217         blockCr0 = Block.create \
 218             ( cr0
 219             , ioPins=[ (IN, 'clk'                                , l( 805.0) )
 220                      , (IW , 'cu_issue_i'                         , l(  30.0) )
 221                      , (IW , 'oper_i_alu_cr0_read_cr_whole'       , l(  40.0) )
 222                      , (IW , 'oper_i_alu_cr0_write_cr_whole'      , l(  70.0) )
 223                      , (IW , 'rst'                                , l( 160.0) )
 224                      , (IW , 'src4_i({})'                         , l( 180.0), l( 10.0),  4)
 225                      , (IW , 'src5_i({})'                         , l( 220.0), l( 10.0),  4)
 226                      , (IW , 'src6_i({})'                         , l( 260.0), l( 10.0),  4)
 227                      , (IW , 'cu_rd_go_i({})'                     , l( 300.0), l( 10.0),  6)
 228                      , (IW , 'cu_rdmaskn_i({})'                   , l( 360.0), l( 10.0),  6)
 229                      , (IW , 'cu_wr_go_i({})'                     , l( 420.0), l( 10.0),  3)
 230                      , (IW , 'oper_i_alu_cr0_insn_type({})'       , l( 450.0), l( 10.0),  7)
 231                      , (IW , 'oper_i_alu_cr0_fn_unit({})'         , l( 520.0), l( 10.0), 11)
 232                      , (IW , 'oper_i_alu_cr0_insn({})'            , l( 630.0), l( 10.0), 32)
 233                      , (IS, 'src1_i({})'                         , l(  10.0), l( 10.0), 64)
 234                      , (IS, 'src2_i({})'                         , l(  15.0), l( 10.0), 64)
 235                      , (IE , 'src3_i({})'                         , l(  10.0), l( 20.0), 32)
 236                      , (IE , 'cu_busy_o'                          , l(4320.0) )
 237                      , (IE , 'cr_a_ok'                            , l(4340.0) )
 238                      , (IE , 'full_cr_ok'                         , l(4360.0) )
 239                      , (IE , 'o_ok'                               , l(4380.0) )
 240                      , (IE , 'dest2_o({})'                        , l(4400.0), l( 10.0), 32)
 241                      , (IE , 'dest3_o({})'                        , l(4720.0), l( 10.0),  4)
 242                      , (IE , 'cu_rd_rel_o({})'                    , l(4800.0), l( 20.0),  6)
 243                      , (IE , 'cu_wr_rel_o({})'                    , l(4920.0), l( 20.0),  3)
 244                      , (IN, 'dest1_o({})'                        , l( 100.0), l( 10.0), 64)
 245                      ]
 246             )
 247         blockCr0.state.cfg.etesian.spaceMargin = 0.10
 248         blockCr0.state.fixedHeight = l(5000)
 249         blockCr0.state.useSpares   = False
 250        #rvalue = blockCr0.build()
 251
 252         ldst0 = af.getCell( 'ldst0', CRL.Catalog.State.Views )
 253         blockLdst0 = Block.create \
 254             ( ldst0
 255             , ioPins=[ (IN              , 'clk'                                , l(805.0) )
 256                      , (IW | AB, 'cu_ad_go_i'                         , 0, l(20),  1)
 257                      , (IW | AB, 'cu_issue_i'                         , 0, l(20),  1)
 258                      , (IW | AB, 'ldst_port0_addr_exc_o'              , 0, l(20),  1)
 259                      , (IW | AB, 'ldst_port0_addr_ok_o'               , 0, l(20),  1)
 260                      , (IW | AB, 'ldst_port0_ld_data_o_ok'            , 0, l(20),  1)
 261                      , (IW | AB, 'oper_i_ldst_ldst0_byte_reverse'     , 0, l(20),  1)
 262                      , (IW | AB, 'oper_i_ldst_ldst0_imm_data_imm_ok'  , 0, l(20),  1)
 263                      , (IW | AB, 'oper_i_ldst_ldst0_is_32bit'         , 0, l(20),  1)
 264                      , (IW | AB, 'oper_i_ldst_ldst0_is_signed'        , 0, l(20),  1)
 265                      , (IW | AB, 'oper_i_ldst_ldst0_oe_oe'            , 0, l(20),  1)
 266                      , (IW | AB, 'oper_i_ldst_ldst0_oe_oe_ok'         , 0, l(20),  1)
 267                      , (IW | AB, 'oper_i_ldst_ldst0_rc_rc'            , 0, l(20),  1)
 268                      , (IW | AB, 'oper_i_ldst_ldst0_rc_rc_ok'         , 0, l(20),  1)
 269                      , (IW | AB, 'oper_i_ldst_ldst0_sign_extend'      , 0, l(20),  1)
 270                      , (IW | AB, 'oper_i_ldst_ldst0_zero_a'           , 0, l(20),  1)
 271                      , (IW | AB, 'rst'                                , 0, l(20),  1)
 272                      , (IW | AB, 'cu_st_go_i'                         , 0, l(20),  1)
 273                      , (IW | AB, 'oper_i_ldst_ldst0_ldst_mode({})'    , 0, l(20),  2)
 274                      , (IW | AB, 'cu_rd_go_i({})'                     , 0, l(20),  3)
 275                      , (IW | AB, 'cu_rdmaskn_i({})'                   , 0, l(20),  3)
 276                      , (IW | AB, 'cu_wr_go_i({})'                     , 0, l(20),  2)
 277                      , (IW | AB, 'oper_i_ldst_ldst0_data_len({})'     , 0, l(20),  4)
 278                      , (IW | AB, 'oper_i_ldst_ldst0_insn_type({})'    , 0, l(20),  7)
 279                      , (IW | AB, 'ldst_port0_ld_data_o({})'           , 0, l(20), 64)
 280                      , (IW | AB, 'oper_i_ldst_ldst0_imm_data_imm({})' , 0, l(20), 64)
 281                      , (IS | AB, 'src1_i({})'                         , 0, l(10), 64)
 282                      , (IS | AB, 'src2_i({})'                         , 0,  l(5), 64)
 283                      , (IE | AE  , 'src3_i({})'                         , 0,     0, 64)
 284                      , (IE | AE  , 'cu_busy_o'                          , 0, l(20),  1)
 285                      , (IE | AE  , 'cu_ad_rel_o'                        , 0, l(20),  1)
 286                      , (IE | AE  , 'ldst_port0_addr_i_ok'               , 0, l(20),  1)
 287                      , (IE | AE  , 'ldst_port0_is_ld_i'                 , 0, l(20),  1)
 288                      , (IE | AE  , 'ldst_port0_is_st_i'                 , 0, l(20),  1)
 289                      , (IE | AE  , 'load_mem_o'                         , 0, l(20),  1)
 290                      , (IE | AE  , 'cu_st_rel_o'                        , 0, l(20),  1)
 291                      , (IE | AE  , 'stwd_mem_o'                         , 0, l(20),  1)
 292                      , (IE | AE  , 'ea({})'                             , 0, l(20), 64)
 293                      , (IE | AE  , 'ldst_port0_st_data_i({})'           , 0, l(20), 64)
 294                      , (IE | AE  , 'cu_rd_rel_o({})'                    , 0,    0,   3)
 295                      , (IE | AE  , 'cu_wr_rel_o({})'                    , 0,    0,   2)
 296                      , (IE | AE  , 'ldst_port0_addr_i_95'               , 0, l(20),  1)
 297                      , (IE | AE  , 'ldst_port0_addr_i_{}'               , 0, l(20), 64)
 298                      , (IN | AE  , 'o({})'                              , 0,     0, 64)
 299                      ]
 300             )
 301         blockLdst0.state.cfg.etesian.uniformDensity      = True
 302         blockLdst0.state.cfg.etesian.spaceMargin         = 0.20
 303         blockLdst0.state.cfg.katana.searchHalo           = 1
 304         blockLdst0.state.cfg.katana.hTracksReservedLocal = 10
 305         blockLdst0.state.cfg.katana.vTracksReservedLocal = 10
 306         blockLdst0.state.fixedHeight = l(5000)
 307         blockLdst0.state.useSpares   = False
 308        #rvalue = blockLdst0.build()
 309
 310         logical0 = af.getCell( 'logical0', CRL.Catalog.State.Views )
 311         blockLogical0 = Block.create \
 312             ( logical0
 313             , ioPins=[ (IN              , 'clk'                                 , l(805.0) )
 314                      , (IW | AB, 'cu_issue_i'                          , 0, l(20),  1)
 315                      , (IW | AB, 'oper_i_alu_logical0_imm_data_imm_ok' , 0, l(20),  1)
 316                      , (IW | AB, 'oper_i_alu_logical0_invert_a'        , 0, l(20),  1)
 317                      , (IW | AB, 'oper_i_alu_logical0_invert_out'      , 0, l(20),  1)
 318                      , (IW | AB, 'oper_i_alu_logical0_is_32bit'        , 0, l(20),  1)
 319                      , (IW | AB, 'oper_i_alu_logical0_is_signed'       , 0, l(20),  1)
 320                      , (IW | AB, 'oper_i_alu_logical0_oe_oe'           , 0, l(20),  1)
 321                      , (IW | AB, 'oper_i_alu_logical0_oe_oe_ok'        , 0, l(20),  1)
 322                      , (IW | AB, 'oper_i_alu_logical0_output_carry'    , 0, l(20),  1)
 323                      , (IW | AB, 'oper_i_alu_logical0_rc_rc'           , 0, l(20),  1)
 324                      , (IW | AB, 'oper_i_alu_logical0_rc_rc_ok'        , 0, l(20),  1)
 325                      , (IW | AB, 'oper_i_alu_logical0_write_cr0'       , 0, l(20),  1)
 326                      , (IW | AB, 'oper_i_alu_logical0_zero_a'          , 0, l(20),  1)
 327                      , (IW | AB, 'rst'                                 , 0, l(20),  1)
 328                      , (IW | AB, 'oper_i_alu_logical0_input_carry({})' , 0, l(20),  2)
 329                      , (IW | AB, 'cu_rd_go_i({})'                      , 0, l(20),  2)
 330                      , (IW | AB, 'cu_rdmaskn_i({})'                    , 0, l(20),  2)
 331                      , (IW | AB, 'cu_wr_go_i({})'                      , 0, l(20),  3)
 332                      , (IW | AB, 'oper_i_alu_logical0_data_len({})'    , 0, l(20),  4)
 333                      , (IW | AB, 'oper_i_alu_logical0_insn_type({})'   , 0, l(20),  7)
 334                      , (IW | AB, 'oper_i_alu_logical0_fn_unit({})'     , 0, l(20), 11)
 335                      , (IW | AB, 'oper_i_alu_logical0_insn({})'        , 0, l(20), 32)
 336                      , (IW | AB, 'oper_i_alu_logical0_imm_data_imm({})', 0, l(20), 64)
 337                      , (IS | AB, 'src1_i({})'                          , 0, l(10), 64)
 338                      , (IS | AB, 'src2_i({})'                          , 0,  l(5), 64)
 339                      , (IE | AE  , 'cu_busy_o'                           , 0, l(20),  1)
 340                      , (IE | AE  , 'cr_a_ok'                             , 0, l(20),  1)
 341                      , (IE | AE  , 'o_ok'                                , 0, l(20),  1)
 342                      , (IE | AE  , 'xer_ca_ok'                           , 0, l(20),  1)
 343                      , (IE | AE  , 'cu_rd_rel_o({})'                     , 0,     0,  2)
 344                      , (IE | AE  , 'cu_wr_rel_o({})'                     , 0,     0,  3)
 345                      , (IN | AE  , 'dest3_o({})'                         , 0,     0,  2)
 346                      , (IN | AE  , 'dest2_o({})'                         , 0,     0,  4)
 347                      , (IN | AE  , 'dest1_o({})'                         , 0,     0, 64)
 348                      ]
 349             )
 350         blockLogical0.state.cfg.etesian.uniformDensity = True
 351         blockLogical0.state.cfg.etesian.spaceMargin    = 0.07
 352         blockLogical0.state.cfg.katana.searchHalo      = 1
 353         blockLogical0.state.fixedHeight = l(5000)
 354         blockLogical0.state.useSpares   = False
 355        #rvalue = blockLogical0.build()
 356
 357         shiftrot0 = af.getCell( 'shiftrot0', CRL.Catalog.State.Views )
 358         blockShiftrot0 = Block.create \
 359             ( shiftrot0
 360             , ioPins=[ (IN              , 'clk'                                   , l(805.0) )
 361                      , (IW | AB, 'cu_issue_i'                               , 0, l(20),  1)
 362                      , (IW | AB, 'oper_i_alu_shift_rot0_imm_data_imm_ok' , 0, l(20),  1)
 363                      , (IW | AB, 'oper_i_alu_shift_rot0_input_cr'        , 0, l(20),  1)
 364                      , (IW | AB, 'oper_i_alu_shift_rot0_is_32bit'        , 0, l(20),  1)
 365                      , (IW | AB, 'oper_i_alu_shift_rot0_is_signed'       , 0, l(20),  1)
 366                      , (IW | AB, 'oper_i_alu_shift_rot0_oe_oe'           , 0, l(20),  1)
 367                      , (IW | AB, 'oper_i_alu_shift_rot0_oe_oe_ok'        , 0, l(20),  1)
 368                      , (IW | AB, 'oper_i_alu_shift_rot0_output_carry'    , 0, l(20),  1)
 369                      , (IW | AB, 'oper_i_alu_shift_rot0_output_cr'       , 0, l(20),  1)
 370                      , (IW | AB, 'oper_i_alu_shift_rot0_rc_rc'           , 0, l(20),  1)
 371                      , (IW | AB, 'oper_i_alu_shift_rot0_rc_rc_ok'        , 0, l(20),  1)
 372                      , (IW | AB, 'rst'                                   , 0, l(20),  1)
 373                      , (IW | AB, 'oper_i_alu_shift_rot0_input_carry({})' , 0, l(20),  2)
 374                      , (IW | AB, 'src4_i({})'                            , 0, l(10),  2)
 375                      , (IW | AB, 'cu_rd_go_i({})'                             , 0, l(20),  4)
 376                      , (IW | AB, 'cu_rdmaskn_i({})'                           , 0, l(20),  4)
 377                      , (IW | AB, 'cu_wr_go_i({})'                             , 0, l(20),  3)
 378                      , (IW | AB, 'oper_i_alu_shift_rot0_insn_type({})'   , 0, l(20),  7)
 379                      , (IW | AB, 'oper_i_alu_shift_rot0_fn_unit({})'     , 0, l(20), 11)
 380                      , (IW | AB, 'oper_i_alu_shift_rot0_insn({})'        , 0, l(20), 32)
 381                      , (IW | AB, 'oper_i_alu_shift_rot0_imm_data_imm({})', 0, l(20), 64)
 382                      , (IW | AB, 'src3_i({})'                            , 0, l(10), 64)
 383                      , (IS | AB, 'src1_i({})'                            , 0, l(10), 64)
 384                      , (IS | AB, 'src2_i({})'                            , 0,  l(5), 64)
 385                      , (IE | AE  , 'cu_busy_o'                                , 0, l(20),  1)
 386                      , (IE | AE  , 'cr_a_ok'                               , 0, l(20),  1)
 387                      , (IE | AE  , 'o_ok'                                  , 0, l(20),  1)
 388                      , (IE | AE  , 'xer_ca_ok'                             , 0, l(20),  1)
 389                      , (IE | AE  , 'cu_rd_rel_o({})'                            , 0,     0,  4)
 390                      , (IE | AE  , 'cu_wr_rel_o({})'                            , 0,     0,  3)
 391                      , (IN | AE  , 'dest3_o({})'                           , 0,     0,  2)
 392                      , (IN | AE  , 'dest2_o({})'                           , 0,     0,  4)
 393                      , (IN | AE  , 'dest1_o({})'                           , 0,     0, 64)
 394                      ]
 395             )
 396         blockShiftrot0.state.cfg.etesian.uniformDensity = True
 397         blockShiftrot0.state.cfg.etesian.spaceMargin    = 0.7
 398         blockShiftrot0.state.cfg.katana.searchHalo      = 1
 399         blockShiftrot0.state.fixedHeight = l(5000)
 400         blockShiftrot0.state.useSpares   = False
 401        #rvalue = blockShiftrot0.build()
 402
 403         spr0 = af.getCell( 'spr0', CRL.Catalog.State.Views )
 404         blockSpr0 = Block.create \
 405             ( spr0
 406             , ioPins=[ (IN              , 'clk'                          , l(805.0) )
 407                      , (IW | AB, 'cu_issue_i'                   , 0, l(20),  1)
 408                      , (IW | AB, 'oper_i_alu_spr0_is_32bit'     , 0, l(20),  1)
 409                      , (IW | AB, 'rst'                          , 0, l(20),  1)
 410                      , (IW | AB, 'src4_i'                       , 0, l(10),  1)
 411                      , (IW | AB, 'src5_i({})'                   , 0, l(10),  2)
 412                      , (IW | AB, 'src6_i({})'                   , 0, l(10),  2)
 413                      , (IW | AB, 'cu_rd_go_i({})'               , 0, l(20),  6)
 414                      , (IW | AB, 'cu_rdmaskn_i({})'             , 0, l(20),  6)
 415                      , (IW | AB, 'cu_wr_go_i({})'               , 0, l(20),  6)
 416                      , (IW | AB, 'oper_i_alu_spr0_insn_type({})', 0, l(20),  7)
 417                      , (IW | AB, 'oper_i_alu_spr0_fn_unit({})'  , 0, l(20), 11)
 418                      , (IW | AB, 'oper_i_alu_spr0_insn({})'     , 0, l(20), 32)
 419                      , (IW | AB, 'src3_i({})'                   , 0, l(10), 64)
 420                      , (IS | AB, 'src1_i({})'                   , 0, l(10), 64)
 421                      , (IS | AB, 'src2_i({})'                   , 0,  l(5), 64)
 422                      , (IE | AE  , 'cu_busy_o'                    , 0, l(20),  1)
 423                      , (IE | AE  , 'dest4_o'                      , 0, l(20),  1)
 424                      , (IE | AE  , 'fast1_ok'                     , 0, l(20),  1)
 425                      , (IE | AE  , 'o_ok'                         , 0, l(20),  1)
 426                      , (IE | AE  , 'spr1_ok'                      , 0, l(20),  1)
 427                      , (IE | AE  , 'xer_ca_ok'                    , 0, l(20),  1)
 428                      , (IE | AE  , 'xer_ov_ok'                    , 0, l(20),  1)
 429                      , (IE | AE  , 'xer_so_ok'                    , 0, l(20),  1)
 430                      , (IE | AE  , 'cu_rd_rel_o({})'              , 0,     0,  6)
 431                      , (IE | AE  , 'cu_wr_rel_o({})'              , 0,     0,  6)
 432                      , (IN | AE  , 'dest5_o({})'                  , 0,     0,  2)
 433                      , (IN | AE  , 'dest6_o({})'                  , 0,     0,  2)
 434                      , (IE | AE  , 'dest3_o({})'                  , 0, l(20), 64)
 435                      , (IE | AE  , 'dest2_o({})'                  , 0, l(20), 64)
 436                      , (IE | AE  , 'dest1_o({})'                  , 0, l(20), 64)
 437                      ]
 438             )
 439         blockSpr0.state.cfg.etesian.uniformDensity = True
 440         blockSpr0.state.cfg.etesian.spaceMargin    = 0.5
 441         blockSpr0.state.cfg.katana.searchHalo      = 1
 442         blockSpr0.state.fixedHeight = l(5000)
 443         blockSpr0.state.useSpares   = False
 444        #rvalue = blockSpr0.build()
 445
 446         trap0 = af.getCell( 'trap0', CRL.Catalog.State.Views )
 447         blockTrap0 = Block.create \
 448             ( trap0
 449             , ioPins=[ (IN              , 'clk'                           , l(805.0) )
 450                      , (IW | AB, 'cu_issue_i'                    , 0, l(20),  1)
 451                      , (IW | AB, 'oper_i_alu_trap0_is_32bit'     , 0, l(20),  1)
 452                      , (IW | AB, 'rst'                           , 0, l(20),  1)
 453                      , (IW | AB, 'cu_rd_go_i({})'                , 0, l(20),  4)
 454                      , (IW | AB, 'cu_rdmaskn_i({})'              , 0, l(20),  4)
 455                      , (IW | AB, 'cu_wr_go_i({})'                , 0, l(20),  5)
 456                      , (IW | AB, 'oper_i_alu_trap0_traptype({})' , 0, l(20),  5)
 457                      , (IW | AB, 'oper_i_alu_trap0_insn_type({})', 0, l(20),  7)
 458                      , (IW | AB, 'oper_i_alu_trap0_fn_unit({})'  , 0, l(20), 11)
 459                      , (IW | AB, 'oper_i_alu_trap0_trapaddr({})' , 0, l(20), 13)
 460                      , (IW | AB, 'oper_i_alu_trap0_insn({})'     , 0, l(20), 32)
 461                      , (IW | AB, 'oper_i_alu_trap0_cia({})'      , 0, l(20), 64)
 462                      , (IW | AB, 'oper_i_alu_trap0_msr({})'      , 0, l(20), 64)
 463                      , (IW | AB, 'src3_i({})'                    , 0, l(10), 64)
 464                      , (IS | AB, 'src4_i({})'                    , 0, l(10), 64)
 465                      , (IS | AB, 'src1_i({})'                    , 0, l(10), 64)
 466                      , (IS | AB, 'src2_i({})'                    , 0,  l(5), 64)
 467                      , (IE | AE  , 'cu_busy_o'                     , 0, l(20),  1)
 468                      , (IE | AE  , 'fast1_ok'                      , 0, l(20),  1)
 469                      , (IE | AE  , 'fast2_ok'                      , 0, l(20),  1)
 470                      , (IE | AE  , 'msr_ok'                        , 0, l(20),  1)
 471                      , (IE | AE  , 'nia_ok'                        , 0, l(20),  1)
 472                      , (IE | AE  , 'o_ok'                          , 0, l(20),  1)
 473                      , (IE | AE  , 'cu_rd_rel_o({})'               , 0,     0,  4)
 474                      , (IE | AE  , 'cu_wr_rel_o({})'               , 0,     0,  5)
 475                      , (IN | AE  , 'dest5_o({})'                   , 0, l(10), 64)
 476                      , (IN | AE  , 'dest4_o({})'                   , 0, l(10), 64)
 477                      , (IE | AE  , 'dest3_o({})'                   , 0, l(10), 64)
 478                      , (IE | AE  , 'dest2_o({})'                   , 0, l(10), 64)
 479                      , (IE | AE  , 'dest1_o({})'                   , 0, l(10), 64)
 480                      ]
 481             )
 482         blockTrap0.state.cfg.etesian.uniformDensity = True
 483         blockTrap0.state.cfg.etesian.spaceMargin    = 0.5
 484         blockTrap0.state.cfg.katana.searchHalo      = 1
 485         blockTrap0.state.fixedHeight = l(5000)
 486         blockTrap0.state.useSpares   = False
 487        #rvalue = blockTrap0.build()
 488
 489         fast = af.getCell( 'fast', CRL.Catalog.State.Views )
 490         blockFast = Block.create \
 491             ( fast
 492             , ioPins=[ (IN              , 'clk'             , l(805.0) )
 493                      , (IW | AB, 'rst'             , 0, l(20),  1)
 494                      , (IW | AB, 'cia_ren({})'     , 0, l(20),  8)
 495                      , (IW | AB, 'fast_nia_wen({})', 0, l(20),  8)
 496                      , (IW | AB, 'msr_ren({})'     , 0, l(20),  8)
 497                      , (IW | AB, 'src1_ren({})'    , 0, l(20),  8)
 498                      , (IW | AB, 'src2_ren({})'    , 0, l(20),  8)
 499                      , (IW | AB, 'wen({})'         , 0, l(20),  8)
 500                      , (IW | AB, 'wen_1({})'       , 0, l(20),  8)
 501                      , (IW | AB, 'wen_3({})'       , 0, l(20),  8)
 502                      , (IW | AB, 'wen_6({})'       , 0, l(20),  8)
 503                      , (IS | AB, 'data_i({})'      , 0, l(20), 64)
 504                      , (IS | AB, 'data_i_2({})'    , 0, l(20), 64)
 505                      , (IS | AB, 'data_i_4({})'    , 0, l(10), 64)
 506                      , (IS | AB, 'data_i_5({})'    , 0, l(10), 64)
 507                      , (IS | AB, 'data_i_7({})'    , 0, l(10), 64)
 508                      , (IN | AE  , 'cia_data_o({})'  , 0, l(20), 64)
 509                      , (IN | AE  , 'msr_data_o({})'  , 0, l(10), 64)
 510                      , (IN | AE  , 'src1_data_o({})' , 0, l(10), 64)
 511                      , (IN | AE  , 'src2_data_o({})' , 0, l(10), 64)
 512                      ]
 513             )
 514         blockFast.state.cfg.etesian.uniformDensity = True
 515         blockFast.state.cfg.etesian.aspectRatio    = 1.0
 516         blockFast.state.cfg.etesian.spaceMargin    = 0.6
 517         blockFast.state.cfg.katana.searchHalo      = 1
 518         blockFast.state.useSpares   = False
 519        #rvalue = blockFast.build()
 520
 521         cellInt  = af.getCell( 'int', CRL.Catalog.State.Views )
 522         blockInt = Block.create \
 523             ( cellInt
 524             , ioPins=[ (IN              , 'clk'             , l(805.0) )
 525                      , (IW | AB, 'rst'             , 0, l(20),  1)
 526                      , (IW | AB, 'wen({})'         , 0, l(20), 32)
 527                      , (IW | AB, 'wen_1({})'       , 0, l(20), 32)
 528                      , (IW | AB, 'src1_ren({})'    , 0, l(20), 32)
 529                      , (IW | AB, 'src2_ren({})'    , 0, l(20), 32)
 530                      , (IW | AB, 'src3_ren({})'    , 0, l(20), 32)
 531                      , (IS | AB, 'data_i({})'      , 0, l(20), 64)
 532                      , (IS | AB, 'data_i_2({})'    , 0, l(20), 64)
 533                      , (IN | AE  , 'src1_data_o({})' , 0, l(10), 64)
 534                      , (IN | AE  , 'src2_data_o({})' , 0, l(10), 64)
 535                      , (IN | AE  , 'src3_data_o({})' , 0, l(10), 64)
 536                      ]
 537             )
 538         blockInt.state.cfg.etesian.uniformDensity = True
 539         blockInt.state.cfg.etesian.aspectRatio    = 1.0
 540         blockInt.state.cfg.etesian.spaceMargin    = 0.07
 541         blockInt.state.cfg.katana.searchHalo      = 1
 542         blockInt.state.useSpares   = False
 543        #rvalue = blockInt.build()
 544
 545         issuer      = af.getCell( 'test_issuer' , CRL.Catalog.State.Logical )
 546         blockIssuer = Block.create \
 547             ( issuer
 548             , ioPins=[]
 549             )
 550
 551         # Cell width:
 552         #
 553         # ================  =================
 554         # alu0              1200
 555         # branch0           1750
 556         # cr0                950
 557         # ldst0             1100
 558         # logical0          1800
 559         # mul0              9600
 560         # shiftrot0         2350
 561         # spr0              1550
 562         # trap0             3250
 563         # fast              ?
 564         # int               ?
 565         # pdecode           ?
 566         # ================  =================
 567
 568         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_0_alu0'
 569                                     , Transformation( l(1000), l(4000), Transformation.Orientation.ID ))
 570         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_1_branch0'
 571                                     , Transformation( l(2700), l(4000), Transformation.Orientation.ID ))
 572         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_2_cr0'
 573                                     , Transformation( l(4950), l(4000), Transformation.Orientation.ID ))
 574         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_3_ldst0'
 575                                     , Transformation( l(6400), l(4000), Transformation.Orientation.ID ))
 576         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_4_logical0'
 577                                     , Transformation( l(8000), l(4000), Transformation.Orientation.ID ))
 578         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_5_mul0'
 579                                     , Transformation( l(10300), l(4000), Transformation.Orientation.ID ))
 580         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_6_shiftrot0'
 581                                     , Transformation( l(20400), l(4000), Transformation.Orientation.ID ))
 582         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_7_spr0'
 583                                     , Transformation( l(23250), l(4000), Transformation.Orientation.ID ))
 584         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2031_fus.subckt_8_trap0'
 585                                     , Transformation( l(25300), l(4000), Transformation.Orientation.ID ))
 586         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2030_fast'
 587                                     , Transformation( l(1000), l(4000), Transformation.Orientation.ID ))
 588         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2032_int'
 589                                     , Transformation( l(1000), l(4000), Transformation.Orientation.ID ))
 590         blockIssuer.useBlockInstance( 'subckt_1008_core.subckt_2034_pdecode2'
 591                                     , Transformation( l(1000), l(4000), Transformation.Orientation.ID ))
 592         blockIssuer.state.cfg.etesian.uniformDensity = True
 593         blockIssuer.state.cfg.etesian.aspectRatio    = 1.0
 594         blockIssuer.state.cfg.etesian.spaceMargin    = 0.07
 595         blockIssuer.state.cfg.katana.searchHalo      = 10000
 596         blockIssuer.state.fixedHeight = l(15000)
 597         blockIssuer.state.fixedWidth  = l(29550)
 598         blockIssuer.state.useSpares   = False
 599         blockIssuer.state.editor      = editor
 600         rvalue = blockIssuer.build()
 601     except Exception, e:
 602         helpers.io.catch( e )
 603         rvalue = False
 604
 605     sys.stdout.flush()
 606     sys.stderr.flush()
 607
 608     return rvalue