1 from nmigen
.compat
.sim
import run_simulation
3 from TLB
.PermissionValidator
import PermissionValidator
5 from TestUtil
.test_helper
import assert_op
8 def set_validator(dut
, d
, xwr
, sm
, sa
, asid
):
11 yield dut
.super_mode
.eq(sm
)
12 yield dut
.super_access
.eq(sa
)
13 yield dut
.asid
.eq(asid
)
16 def check_valid(dut
, v
, op
):
17 out_v
= yield dut
.valid
18 assert_op("Valid", out_v
, v
, op
)
21 # 80 bits represented. Ignore the MSB as it will be truncated
22 # ASID is bits first 4 hex values (bits 64 - 78)
24 # Test user mode entry valid
25 # Global Bit matching ASID
26 # Ensure that user mode and valid is enabled!
27 data
= 0x7FFF0000000000000031
28 # Ignore MSB it will be truncated
34 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
35 yield from check_valid(dut
, valid
, 0)
37 # Test user mode entry valid
38 # Global Bit nonmatching ASID
39 # Ensure that user mode and valid is enabled!
40 data
= 0x7FFF0000000000000031
41 # Ignore MSB it will be truncated
47 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
48 yield from check_valid(dut
, valid
, 0)
50 # Test user mode entry invalid
51 # Global Bit nonmatching ASID
52 # Ensure that user mode and valid is enabled!
53 data
= 0x7FFF0000000000000021
54 # Ignore MSB it will be truncated
60 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
61 yield from check_valid(dut
, valid
, 0)
63 # Test user mode entry valid
64 # Ensure that user mode and valid is enabled!
65 data
= 0x7FFF0000000000000011
66 # Ignore MSB it will be truncated
72 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
73 yield from check_valid(dut
, valid
, 0)
75 # Test user mode entry invalid
76 # Ensure that user mode and valid is enabled!
77 data
= 0x7FFF0000000000000011
78 # Ignore MSB it will be truncated
84 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
85 yield from check_valid(dut
, valid
, 0)
87 # Test supervisor mode entry valid
88 # The entry is NOT in user mode
89 # Ensure that user mode and valid is enabled!
90 data
= 0x7FFF0000000000000001
91 # Ignore MSB it will be truncated
97 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
98 yield from check_valid(dut
, valid
, 0)
100 # Test supervisor mode entry invalid
101 # The entry is in user mode
102 # Ensure that user mode and valid is enabled!
103 data
= 0x7FFF0000000000000011
104 # Ignore MSB it will be truncated
110 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
111 yield from check_valid(dut
, valid
, 0)
113 # Test supervisor mode entry valid
114 # The entry is NOT in user mode with access
115 # Ensure that user mode and valid is enabled!
116 data
= 0x7FFF0000000000000001
117 # Ignore MSB it will be truncated
123 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
124 yield from check_valid(dut
, valid
, 0)
126 # Test supervisor mode entry valid
127 # The entry is in user mode with access
128 # Ensure that user mode and valid is enabled!
129 data
= 0x7FFF0000000000000011
130 # Ignore MSB it will be truncated
136 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
137 yield from check_valid(dut
, valid
, 0)
141 dut
= PermissionValidator(15, 64);
142 run_simulation(dut
, tbench(dut
), vcd_name
="Waveforms/test_permission_validator.vcd")
143 print("PermissionValidator Unit Test Success")
145 if __name__
== "__main__":