1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
, Signal
, Cat
6 from nmigen
.cli
import main
10 def __init__(self
, width
, m_width
=None):
13 m_width
= width
+ 3 # extra accuracy bits
14 self
.v
= Signal(width
) # Latched copy of value
15 self
.m
= Signal(m_width
) # Mantissa
16 self
.e
= Signal((10, True)) # Exponent: 10 bits, signed
17 self
.s
= Signal() # Sign bit
21 return [self
.m
.eq(Cat(0, 0, 0, v
[0:23])), # mantissa
22 self
.e
.eq(Cat(v
[23:31]) - 127), # exponent (take off bias)
23 self
.s
.eq(Cat(v
[31])), # sign
26 def create(self
, s
, e
, m
):
28 self
.v
[31].eq(s
), # sign
29 self
.v
[23:31].eq(e
), # exp
30 self
.v
[0:23].eq(m
) # mantissa
34 return self
.create(s
, 0xff, 1<<22)
37 return self
.create(s
, 0xff, 0)
40 return (self
.e
== 128) & (self
.m
!= 0)
43 return (self
.e
== 128) & (self
.m
== 0)
46 return (self
.e
== -127) & (self
.m
== 0)
50 def __init__(self
, width
):
53 self
.in_a
= Signal(width
)
54 self
.in_a_stb
= Signal()
55 self
.in_a_ack
= Signal()
57 self
.in_b
= Signal(width
)
58 self
.in_b_stb
= Signal()
59 self
.in_b_ack
= Signal()
61 self
.out_z
= Signal(width
)
62 self
.out_z_stb
= Signal()
63 self
.out_z_ack
= Signal()
65 def get_fragment(self
, platform
):
71 z
= FPNum(self
.width
, 24)
89 with m
.State("get_a"):
90 with m
.If((self
.in_a_ack
) & (self
.in_a_stb
)):
97 m
.d
.sync
+= self
.in_a_ack
.eq(1)
102 with m
.State("get_b"):
103 with m
.If((self
.in_b_ack
) & (self
.in_b_stb
)):
110 m
.d
.sync
+= self
.in_b_ack
.eq(1)
113 # unpacks operands into sign, mantissa and exponent
115 with m
.State("unpack"):
116 m
.next
= "special_cases"
117 m
.d
.sync
+= a
.decode()
118 m
.d
.sync
+= b
.decode()
121 # special cases: NaNs, infs, zeros, denormalised
123 with m
.State("special_cases"):
125 # if a is NaN or b is NaN return NaN
126 with m
.If(a
.is_nan() | b
.is_nan()):
130 # if a is inf return inf (or NaN)
131 with m
.Elif(a
.is_inf()):
133 m
.d
.sync
+= z
.inf(a
.s
)
134 # if a is inf and signs don't match return NaN
135 with m
.If((b
.e
== 128) & (a
.s
!= b
.s
)):
136 m
.d
.sync
+= z
.nan(b
.s
)
138 # if b is inf return inf
139 with m
.Elif(b
.is_inf()):
141 m
.d
.sync
+= z
.inf(b
.s
)
143 # if a is zero and b zero return signed-a/b
144 with m
.Elif(a
.is_zero() & b
.is_zero()):
146 m
.d
.sync
+= z
.create(a
.s
& b
.s
, b
.e
[0:8] + 127, b
.m
[3:26])
148 # if a is zero return b
149 with m
.Elif((a
.is_zero()):
151 m
.d
.sync
+= z
.create(b
.s
, b
.e
[0:8] + 127, b
.m
[3:26])
153 # if b is zero return a
154 with m
.Elif((b
.is_zero()):
156 m
.d
.sync
+= z
.create(a
.s
, a
.e
[0:8] + 127, a
.m
[3:26])
158 # Denormalised Number checks
161 # denormalise a check
162 with m
.If(a
.e
== -127):
163 m
.d
.sync
+= a
.e
.eq(-126) # limit a exponent
165 m
.d
.sync
+= a
.m
[26].eq(1) # set highest mantissa bit
166 # denormalise b check
167 with m
.If(b
.e
== -127):
168 m
.d
.sync
+= b
.e
.eq(-126) # limit b exponent
170 m
.d
.sync
+= b
.m
[26].eq(1) # set highest mantissa bit
173 # align. NOTE: this does *not* do single-cycle multi-shifting,
174 # it *STAYS* in the align state until the exponents match
176 with m
.State("align"):
177 # exponent of a greater than b: increment b exp, shift b mant
178 with m
.If(a
.e
> b
.e
):
182 b
.m
[0].eq(b
.m
[0] | b
.m
[1]) # moo??
184 # exponent of b greater than a: increment a exp, shift a mant
185 with m
.Elif(a
.e
< b
.e
):
189 a
.m
[0].eq(a
.m
[0] | a
.m
[1]) # moo??
191 # exponents equal: move to next stage.
196 # First stage of add. covers same-sign (add) and subtract
197 # special-casing when mantissas are greater or equal, to
198 # give greatest accuracy.
200 with m
.State("add_0"):
202 m
.d
.sync
+= z
.e
.eq(a
.e
)
203 # same-sign (both negative or both positive) add mantissas
204 with m
.If(a
.s
== b
.s
):
209 # a mantissa greater than b, use a
210 with m
.Elif(a
.m
>= b
.m
):
215 # b mantissa greater than a, use b
223 # Second stage of add: preparation for normalisation.
224 # detects when tot sum is too big (tot[27] is kinda a carry bit)
226 with m
.State("add_1"):
227 m
.next
= "normalise_1"
228 # tot[27] gets set when the sum overflows. shift result down
233 round_bit
.eq(tot
[2]),
234 sticky
.eq(tot
[1] | tot
[0]),
242 round_bit
.eq(tot
[1]),
247 # First stage of normalisation.
248 # NOTE: just like "align", this one keeps going round every clock
249 # until the result's exponent is within acceptable "range"
250 # NOTE: the weirdness of reassigning guard and round is due to
251 # the extra mantissa bits coming from tot[0..2]
253 with m
.State("normalise_1"):
254 with m
.If((z
.m
[23] == 0) & (z
.e
> -126)):
256 z
.e
.eq(z
.e
- 1), # DECREASE exponent
257 z
.m
.eq(z
.m
<< 1), # shift mantissa UP
258 z
.m
[0].eq(guard
), # steal guard bit (was tot[2])
259 guard
.eq(round_bit
), # steal round_bit (was tot[1])
262 m
.next
= "normalize_2"
265 # Second stage of normalisation.
266 # NOTE: just like "align", this one keeps going round every clock
267 # until the result's exponent is within acceptable "range"
268 # NOTE: the weirdness of reassigning guard and round is due to
269 # the extra mantissa bits coming from tot[0..2]
271 with m
.State("normalise_2"):
272 with m
.If(z
.e
< -126):
274 z
.e
.eq(z
.e
+ 1), # INCREASE exponent
275 z
.m
.eq(z
.m
>> 1), # shift mantissa DOWN
278 sticky
.eq(sticky | round_bit
)
286 with m
.State("round"):
288 with m
.If(guard
& (round_bit | sticky | z
.m
[0])):
289 m
.d
.sync
+= z
.m
.eq(z
.m
+ 1) # mantissa rounds up
290 with m
.If(z
.m
== 0xffffff): # all 1s
291 m
.d
.sync
+= z
.e
.eq(z
.e
+ 1) # exponent rounds up
296 always @(posedge clk)
304 if (s_in_a_ack && in_a_stb) begin
314 if (s_in_b_ack && in_b_stb) begin
323 a_m <= {a[22 : 0], 3'd0};
324 b_m <= {b[22 : 0], 3'd0};
325 a_e <= a[30 : 23] - 127;
326 b_e <= b[30 : 23] - 127;
329 state <= special_cases;
334 //if a is NaN or b is NaN return NaN
335 if ((a_e == 128 && a_m != 0) || (b_e == 128 && b_m != 0)) begin
341 //if a is inf return inf
342 end else if (a_e == 128) begin
346 //if a is inf and signs don't match return nan
347 if ((b_e == 128) && (a_s != b_s)) begin
354 //if b is inf return inf
355 end else if (b_e == 128) begin
360 //if a is zero return b
361 end else if ((($signed(a_e) == -127) && (a_m == 0)) && (($signed(b_e) == -127) && (b_m == 0))) begin
363 z[30:23] <= b_e[7:0] + 127;
364 z[22:0] <= b_m[26:3];
366 //if a is zero return b
367 end else if (($signed(a_e) == -127) && (a_m == 0)) begin
369 z[30:23] <= b_e[7:0] + 127;
370 z[22:0] <= b_m[26:3];
372 //if b is zero return a
373 end else if (($signed(b_e) == -127) && (b_m == 0)) begin
375 z[30:23] <= a_e[7:0] + 127;
376 z[22:0] <= a_m[26:3];
379 //Denormalised Number
380 if ($signed(a_e) == -127) begin
385 //Denormalised Number
386 if ($signed(b_e) == -127) begin
397 if ($signed(a_e) > $signed(b_e)) begin
400 b_m[0] <= b_m[0] | b_m[1];
401 end else if ($signed(a_e) < $signed(b_e)) begin
404 a_m[0] <= a_m[0] | a_m[1];
413 if (a_s == b_s) begin
417 if (a_m >= b_m) begin
434 sticky <= tot[1] | tot[0];
442 state <= normalise_1;
447 if (z_m[23] == 0 && $signed(z_e) > -126) begin
454 state <= normalise_2;
460 if ($signed(z_e) < -126) begin
465 sticky <= sticky | round_bit;
473 if (guard && (round_bit | sticky | z_m[0])) begin
475 if (z_m == 24'hffffff) begin
484 z[22 : 0] <= z_m[22:0];
485 z[30 : 23] <= z_e[7:0] + 127;
487 if ($signed(z_e) == -126 && z_m[23] == 0) begin
490 if ($signed(z_e) == -126 && z_m[23:0] == 24'h0) begin
491 z[31] <= 1'b0; // FIX SIGN BUG: -a + a = +0.
493 //if overflow occurs, return inf
494 if ($signed(z_e) > 127) begin
506 if (s_out_z_stb && out_z_ack) begin
522 assign in_a_ack = s_in_a_ack;
523 assign in_b_ack = s_in_b_ack;
524 assign out_z_stb = s_out_z_stb;
525 assign out_z = s_out_z;
530 if __name__
== "__main__":
531 alu
= FPADD(width
=32)
533 alu
.in_a
, alu
.in_a_stb
, alu
.in_a_ack
,
534 alu
.in_b
, alu
.in_b_stb
, alu
.in_b_ack
,
535 alu
.out_z
, alu
.out_z_stb
, alu
.out_z_ack
,