1 from nmigen
import Module
, Signal
2 from nmigen
.compat
.sim
import run_simulation
3 from operator
import mul
9 from random
import randint
10 from random
import seed
12 from unit_test_double
import (get_mantissa
, get_exponent
, get_sign
, is_nan
,
13 is_inf
, is_pos_inf
, is_neg_inf
,
14 match
, get_case
, check_case
, run_test
,
15 run_edge_cases
, run_corner_cases
)
19 yield from check_case(dut
, 0, 0, 0)
24 stimulus_a
= [0xff80000000000000, 0x3351099a0528e138]
25 stimulus_b
= [0x7f80000000000000, 0xd651a9a9986af2b5]
26 yield from run_test(dut
, stimulus_a
, stimulus_b
, mul
)
27 count
+= len(stimulus_a
)
28 print (count
, "vectors passed")
30 yield from run_corner_cases(dut
, count
, mul
)
31 yield from run_edge_cases(dut
, count
, mul
)
34 if __name__
== '__main__':
36 run_simulation(dut
, testbench(dut
), vcd_name
="test_mul64.vcd")