1 from nmigen
import Module
, Signal
2 from nmigen
.back
.pysim
import Simulator
, Delay
3 from nmigen
.test
.utils
import FHDLTestCase
5 from ieee754
.cordic
.fpsin_cos
import CORDIC
6 from ieee754
.fpcommon
.fpbase
import FPNumBaseRecord
7 from python_sin_cos
import run_cordic
8 from sfpy
import Float16
, Float32
14 class SinCosTestCase(FHDLTestCase
):
15 def run_test(self
, zin
=0, fracbits
=8, expected_sin
=0, expected_cos
=0):
19 m
.submodules
.dut
= dut
= CORDIC(16)
20 z
= Signal(dut
.z0
.width
)
23 sin
= Signal(dut
.sin
.shape())
24 cos
= Signal(dut
.cos
.shape())
39 yield z
.eq(zin
.get_bits())
45 for i
in range(dut
.fracbits
+1):
48 if rdy
and not asserted
:
49 frac
= self
.get_frac(zo
, dut
.z_out
.width
- 2)
50 print(f
"{zo:x} {frac}")
51 self
.assertEqual(str(frac
), zin
.__str
__())
54 real_sin
= yield dut
.sin
55 real_sin
= self
.get_frac(real_sin
, dut
.sin
.width
- 2)
56 diff
= abs(real_sin
- expected_sin
)
57 print(f
"{real_sin} {expected_sin} {diff}")
58 self
.assertTrue(diff
< 0.001)
59 real_cos
= yield dut
.cos
60 real_cos
= self
.get_frac(real_cos
, dut
.cos
.width
- 2)
61 diff
= abs(real_cos
- expected_cos
)
62 print(f
"{real_cos} {expected_cos} {diff}")
63 self
.assertTrue(diff
< 0.001)
67 sim
.add_sync_process(process
)
68 with sim
.write_vcd("fpsin_cos.vcd", "fpsin_cos.gtkw", traces
=[
69 cos
, sin
, ready
, start
]):
72 def run_test_assert(self
, z
, fracbits
=8):
73 zpi
= z
* Float16(math
.pi
/2)
76 self
.run_test(zin
=z
, fracbits
=fracbits
, expected_sin
=e_sin
,
82 self
.run_test_assert(x
)
87 self
.run_test_assert(x
)
91 z
= random
.uniform(-1, 1)
93 self
.run_test_assert(f
)
95 def get_frac(self
, value
, bits
):
96 return value
/(1 << bits
)
98 if __name__
== "__main__":