1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
, Signal
, Elaboratable
6 from nmigen
.cli
import main
, verilog
8 from ieee754
.fpcommon
.fpbase
import FPNumOut
, FPNumBaseRecord
, FPNumBase
9 from ieee754
.fpcommon
.fpbase
import FPState
10 from .roundz
import FPRoundData
11 from nmutil
.singlepipe
import Object
12 from ieee754
.fpcommon
.getop
import FPBaseData
15 class FPPackData(Object
):
17 def __init__(self
, width
, pspec
):
19 self
.z
= Signal(width
, reset_less
=True) # result
20 self
.ctx
= FPBaseData(width
, pspec
)
21 self
.muxid
= self
.ctx
.muxid
23 class FPPackMod(Elaboratable
):
25 def __init__(self
, width
, pspec
):
32 return FPRoundData(self
.width
, self
.pspec
)
35 return FPPackData(self
.width
, self
.pspec
)
40 def setup(self
, m
, in_z
):
41 """ links module to inputs and outputs
43 m
.submodules
.pack
= self
44 m
.d
.comb
+= self
.i
.eq(in_z
)
46 def elaborate(self
, platform
):
48 z
= FPNumBaseRecord(self
.width
, False)
49 m
.submodules
.pack_in_z
= in_z
= FPNumBase(self
.i
.z
)
50 #m.submodules.pack_out_z = out_z = FPNumOut(z)
51 m
.d
.comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)
52 with m
.If(~self
.i
.out_do_z
):
53 with m
.If(in_z
.is_overflowed
):
54 m
.d
.comb
+= z
.inf(self
.i
.z
.s
)
56 m
.d
.comb
+= z
.create(self
.i
.z
.s
, self
.i
.z
.e
, self
.i
.z
.m
)
58 m
.d
.comb
+= z
.v
.eq(self
.i
.oz
)
59 m
.d
.comb
+= self
.o
.z
.eq(z
.v
)
63 class FPPack(FPState
):
65 def __init__(self
, width
, id_wid
):
66 FPState
.__init
__(self
, "pack")
67 self
.mod
= FPPackMod(width
)
68 self
.out_z
= self
.ospec()
71 return self
.mod
.ispec()
74 return self
.mod
.ospec()
76 def setup(self
, m
, in_z
):
77 """ links module to inputs and outputs
79 self
.mod
.setup(m
, in_z
)
81 m
.d
.sync
+= self
.out_z
.v
.eq(self
.mod
.out_z
.v
)
82 m
.d
.sync
+= self
.out_z
.ctx
.eq(self
.mod
.o
.ctx
)