format code
[ieee754fpu.git] / src / ieee754 / fpdiv / test / test_fpdiv_pipe.py
1 """ test of FPDIVMuxInOut
2 """
3
4 from ieee754.fpdiv.pipeline import FPDIVMuxInOut
5 from ieee754.fpcommon.test.fpmux import runfp
6 from ieee754.div_rem_sqrt_rsqrt.core import DivPipeCoreOperation
7
8 import unittest
9 from sfpy import Float64, Float32, Float16
10 from operator import truediv as div
11
12
13 class TestDivPipe(unittest.TestCase):
14 def test_pipe_div_fp16(self):
15 dut = FPDIVMuxInOut(16, 4)
16 # don't forget to initialize opcode; don't use magic numbers
17 opcode = int(DivPipeCoreOperation.UDivRem)
18 runfp(dut, 16, "test_fpdiv_pipe_fp16", Float16, div,
19 opcode=opcode)
20
21 def test_pipe_div_fp32(self):
22 dut = FPDIVMuxInOut(32, 4)
23 # don't forget to initialize opcode; don't use magic numbers
24 opcode = int(DivPipeCoreOperation.UDivRem)
25 runfp(dut, 32, "test_fpdiv_pipe_fp32", Float32, div,
26 opcode=opcode)
27
28 def test_pipe_div_fp64(self):
29 dut = FPDIVMuxInOut(64, 4)
30 # don't forget to initialize opcode; don't use magic numbers
31 opcode = int(DivPipeCoreOperation.UDivRem)
32 runfp(dut, 64, "test_fpdiv_pipe_fp64", Float64, div,
33 opcode=opcode)
34
35
36 if __name__ == '__main__':
37 unittest.main()