src/ieee754/fpmul/mul0.py

   1 """IEEE754 Floating Point Multiplier Pipeline
   2
   3 Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
   4
   5 """
   6
   7 from nmigen import Module, Signal, Cat, Elaboratable
   8 from nmigen.cli import main, verilog
   9
  10 from ieee754.fpcommon.modbase import FPModBase
  11 from ieee754.fpcommon.fpbase import FPNumBaseRecord
  12 from ieee754.fpcommon.denorm import FPSCData
  13 from ieee754.fpcommon.getop import FPPipeContext
  14
  15
  16 class FPMulStage0Data:
  17
  18     def __init__(self, pspec):
  19         width = pspec.width
  20         self.z = FPNumBaseRecord(width, False)
  21         self.out_do_z = Signal(reset_less=True)
  22         self.oz = Signal(width, reset_less=True)
  23         mw = (self.z.m_width)*2 - 1 + 3 # sticky/round/guard bits + (2*mant) - 1
  24         self.product = Signal(mw, reset_less=True)
  25         self.ctx = FPPipeContext(pspec)
  26         self.muxid = self.ctx.muxid
  27
  28     def eq(self, i):
  29         return [self.z.eq(i.z), self.out_do_z.eq(i.out_do_z), self.oz.eq(i.oz),
  30                 self.product.eq(i.product), self.ctx.eq(i.ctx)]
  31
  32
  33 class FPMulStage0Mod(FPModBase):
  34
  35     def __init__(self, pspec):
  36         super().__init__(pspec, "mul0")
  37
  38     def ispec(self):
  39         return FPSCData(self.pspec, False)
  40
  41     def ospec(self):
  42         return FPMulStage0Data(self.pspec)
  43
  44     def elaborate(self, platform):
  45         m = Module()
  46         comb = m.d.comb
  47
  48         # store intermediate tests (and zero-extended mantissas)
  49         am0 = Signal(len(self.i.a.m)+1, reset_less=True)
  50         bm0 = Signal(len(self.i.b.m)+1, reset_less=True)
  51         comb += [
  52                      am0.eq(Cat(self.i.a.m, 0)),
  53                      bm0.eq(Cat(self.i.b.m, 0))
  54                     ]
  55         # same-sign (both negative or both positive) mul mantissas
  56         with m.If(~self.i.out_do_z):
  57             comb += [self.o.z.e.eq(self.i.a.e + self.i.b.e + 1),
  58                          self.o.product.eq(am0 * bm0 * 4),
  59                          self.o.z.s.eq(self.i.a.s ^ self.i.b.s)
  60                 ]
  61
  62         comb += self.o.oz.eq(self.i.oz)
  63         comb += self.o.out_do_z.eq(self.i.out_do_z)
  64         comb += self.o.ctx.eq(self.i.ctx)
  65
  66         return m