1 # IEEE Floating Point Muler (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
, Signal
, Cat
, Elaboratable
6 from nmigen
.cli
import main
, verilog
8 from ieee754
.fpcommon
.fpbase
import FPNumBaseRecord
9 from ieee754
.fpcommon
.fpbase
import FPState
10 from ieee754
.fpcommon
.denorm
import FPSCData
13 class FPMulStage0Data
:
15 def __init__(self
, width
, id_wid
):
16 self
.z
= FPNumBaseRecord(width
, False)
17 self
.out_do_z
= Signal(reset_less
=True)
18 self
.oz
= Signal(width
, reset_less
=True)
19 mw
= (self
.z
.m_width
)*2 - 1 + 3 # sticky/round/guard bits + (2*mant) - 1
20 self
.product
= Signal(mw
, reset_less
=True)
21 self
.mid
= Signal(id_wid
, reset_less
=True)
24 return [self
.z
.eq(i
.z
), self
.out_do_z
.eq(i
.out_do_z
), self
.oz
.eq(i
.oz
),
25 self
.product
.eq(i
.product
), self
.mid
.eq(i
.mid
)]
28 class FPMulStage0Mod(Elaboratable
):
30 def __init__(self
, width
, id_wid
):
37 return FPSCData(self
.width
, self
.id_wid
, False)
40 return FPMulStage0Data(self
.width
, self
.id_wid
)
45 def setup(self
, m
, i
):
46 """ links module to inputs and outputs
48 m
.submodules
.mul0
= self
49 m
.d
.comb
+= self
.i
.eq(i
)
51 def elaborate(self
, platform
):
53 #m.submodules.mul0_in_a = self.i.a
54 #m.submodules.mul0_in_b = self.i.b
55 #m.submodules.mul0_out_z = self.o.z
57 # store intermediate tests (and zero-extended mantissas)
58 am0
= Signal(len(self
.i
.a
.m
)+1, reset_less
=True)
59 bm0
= Signal(len(self
.i
.b
.m
)+1, reset_less
=True)
61 am0
.eq(Cat(self
.i
.a
.m
, 0)),
62 bm0
.eq(Cat(self
.i
.b
.m
, 0))
64 # same-sign (both negative or both positive) mul mantissas
65 with m
.If(~self
.i
.out_do_z
):
66 m
.d
.comb
+= [self
.o
.z
.e
.eq(self
.i
.a
.e
+ self
.i
.b
.e
+ 1),
67 self
.o
.product
.eq(am0
* bm0
* 4),
68 self
.o
.z
.s
.eq(self
.i
.a
.s ^ self
.i
.b
.s
)
71 m
.d
.comb
+= self
.o
.oz
.eq(self
.i
.oz
)
72 m
.d
.comb
+= self
.o
.out_do_z
.eq(self
.i
.out_do_z
)
73 m
.d
.comb
+= self
.o
.mid
.eq(self
.i
.mid
)
77 class FPMulStage0(FPState
):
78 """ First stage of mul.
81 def __init__(self
, width
, id_wid
):
82 FPState
.__init
__(self
, "multiply_0")
83 self
.mod
= FPMulStage0Mod(width
)
84 self
.o
= self
.mod
.ospec()
86 def setup(self
, m
, i
):
87 """ links module to inputs and outputs
91 # NOTE: these could be done as combinatorial (merge mul0+mul1)
92 m
.d
.sync
+= self
.o
.eq(self
.mod
.o
)