1 # IEEE Floating Point Conversion, FSGNJ
2 # Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
3 # Copyright (C) 2020 Michael Nolan <mtnolan2640@gmail.com>
6 from nmigen
import Module
, Signal
, Cat
, Mux
8 from nmutil
.pipemodbase
import PipeModBase
9 from ieee754
.fpcommon
.basedata
import FPBaseData
10 from ieee754
.fpcommon
.packdata
import FPPackData
11 from ieee754
.fpcommon
.fpbase
import FPNumDecode
, FPNumBaseRecord
14 class FSGNJPipeMod(PipeModBase
):
15 """ FP Sign injection - replaces operand A's sign bit with one
16 generated from operand B
18 self.ctx.i.op & 0x3 == 0x0 : Copy sign bit from operand B
19 self.ctx.i.op & 0x3 == 0x1 : Copy inverted sign bit from operand B
20 self.ctx.i.op & 0x3 == 0x2 : Sign bit is A's sign XOR B's sign
22 def __init__(self
, in_pspec
):
23 self
.in_pspec
= in_pspec
24 super().__init
__(in_pspec
, "fsgnj")
27 return FPBaseData(self
.in_pspec
)
30 return FPPackData(self
.in_pspec
)
32 def elaborate(self
, platform
):
35 width
= self
.pspec
.width
41 a1
= FPNumBaseRecord(width
, False)
42 b1
= FPNumBaseRecord(width
, False)
43 m
.submodules
.sc_decode_a
= a1
= FPNumDecode(None, a1
)
44 m
.submodules
.sc_decode_b
= b1
= FPNumDecode(None, b1
)
45 comb
+= [a1
.v
.eq(self
.i
.a
),
48 opcode
= self
.i
.ctx
.op
52 sign
= Mux(opcode
[0], ~b1
.s
, b1
.s
)
53 sign
= Mux(opcode
[1], sign ^ a1
.s
, sign
)
56 comb
+= z1
.eq(a1
.fp
.create2(sign
, a1
.e
, a1
.m
))
58 # copy the context (muxid, operator)
59 comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)