src/openpower/decoder/isa/test_caller.py

   1 import unittest
   2
   3 from nmutil.formaltest import FHDLTestCase
   4 from openpower.decoder.isa.test_runner import run_tst
   5 from openpower.decoder.selectable_int import SelectableInt
   6 from openpower.simulator.program import Program
   7
   8
   9 class DecoderTestCase(FHDLTestCase):
  10     def test_add(self):
  11         lst = ["add 1, 3, 2"]
  12         initial_regs = [0] * 32
  13         initial_regs[3] = 0x1234
  14         initial_regs[2] = 0x4321
  15         with Program(lst, bigendian=False) as program:
  16             sim = self.run_tst_program(program, initial_regs)
  17             self.assertEqual(sim.gpr(1), SelectableInt(0x5555, 64))
  18
  19     def test_addi(self):
  20         lst = ["addi 3, 0, 0x1234",
  21                "addi 2, 0, 0x4321",
  22                "add  1, 3, 2"]
  23         with Program(lst, bigendian=False) as program:
  24             sim = self.run_tst_program(program)
  25             print(sim.gpr(1))
  26             self.assertEqual(sim.gpr(1), SelectableInt(0x5555, 64))
  27
  28     def test_load_store(self):
  29         lst = ["addi 1, 0, 0x0010",
  30                "addi 2, 0, 0x1234",
  31                "stw 2, 0(1)",
  32                "lwz 3, 0(1)"]
  33         with Program(lst, bigendian=False) as program:
  34             sim = self.run_tst_program(program)
  35             print(sim.gpr(1))
  36             self.assertEqual(sim.gpr(3), SelectableInt(0x1234, 64))
  37
  38     @unittest.skip("broken")
  39     def test_addpcis(self):
  40         lst = ["addpcis 1, 0x1",
  41                "addpcis 2, 0x1",
  42                "addpcis 3, 0x1"]
  43         with Program(lst, bigendian=False) as program:
  44             sim = self.run_tst_program(program)
  45             self.assertEqual(sim.gpr(1), SelectableInt(0x10004, 64))
  46             self.assertEqual(sim.gpr(2), SelectableInt(0x10008, 64))
  47             self.assertEqual(sim.gpr(3), SelectableInt(0x1000c, 64))
  48
  49     def test_branch(self):
  50         lst = ["ba 0xc",             # branch to line 4
  51                "addi 1, 0, 0x1234",  # Should never execute
  52                "ba 0x1000",          # exit the program
  53                "addi 2, 0, 0x1234",  # line 4
  54                "ba 0x8"]             # branch to line 3
  55         with Program(lst, bigendian=False) as program:
  56             sim = self.run_tst_program(program)
  57             self.assertEqual(sim.pc.CIA, SelectableInt(0x1000, 64))
  58             self.assertEqual(sim.gpr(1), SelectableInt(0x0, 64))
  59             self.assertEqual(sim.gpr(2), SelectableInt(0x1234, 64))
  60
  61     def test_branch_link(self):
  62         lst = ["bl 0xc",
  63                "addi 2, 1, 0x1234",
  64                "ba 0x1000",
  65                "addi 1, 0, 0x1234",
  66                "bclr 20, 0, 0"]
  67         with Program(lst, bigendian=False) as program:
  68             sim = self.run_tst_program(program)
  69             self.assertEqual(sim.spr['LR'], SelectableInt(0x4, 64))
  70
  71     def test_branch_ctr(self):
  72         lst = ["addi 1, 0, 0x10",    # target of jump
  73                "mtspr 9, 1",         # mtctr 1
  74                "bcctr 20, 0, 0",     # bctr
  75                "addi 2, 0, 0x1",     # should never execute
  76                "addi 1, 0, 0x1234"]  # target of ctr
  77         with Program(lst, bigendian=False) as program:
  78             sim = self.run_tst_program(program)
  79             self.assertEqual(sim.spr['CTR'], SelectableInt(0x10, 64))
  80             self.assertEqual(sim.gpr(1), SelectableInt(0x1234, 64))
  81             self.assertEqual(sim.gpr(2), SelectableInt(0, 64))
  82
  83     def test_branch_cond(self):
  84         for i in [0, 10]:
  85             lst = [f"addi 1, 0, {i}",  # set r1 to i
  86                    "cmpi cr0, 1, 1, 10",  # compare r1 with 10 and store to cr0
  87                    "bc 12, 2, 0x8",       # beq 0x8 -
  88                                        # branch if r1 equals 10 to the nop below
  89                    "addi 2, 0, 0x1234",   # if r1 == 10 this shouldn't execute
  90                    "or 0, 0, 0"]          # branch target
  91             with Program(lst, bigendian=False) as program:
  92                 sim = self.run_tst_program(program)
  93                 if i == 10:
  94                     self.assertEqual(sim.gpr(2), SelectableInt(0, 64))
  95                 else:
  96                     self.assertEqual(sim.gpr(2), SelectableInt(0x1234, 64))
  97
  98     def test_branch_loop(self):
  99         lst = ["addi 1, 0, 0",
 100                "addi 1, 0, 0",
 101                "addi 1, 1, 1",
 102                "add  2, 2, 1",
 103                "cmpi cr0, 1, 1, 10",
 104                "bc 12, 0, -0xc"]
 105         with Program(lst, bigendian=False) as program:
 106             sim = self.run_tst_program(program)
 107             # Verified with qemu
 108             self.assertEqual(sim.gpr(2), SelectableInt(0x37, 64))
 109
 110     def test_branch_loop_ctr(self):
 111         lst = ["addi 1, 0, 0",
 112                "addi 2, 0, 7",
 113                "mtspr 9, 2",    # set ctr to 7
 114                "addi 1, 1, 5",
 115                "bc 16, 0, -0x4"]  # bdnz to the addi above
 116         with Program(lst, bigendian=False) as program:
 117             sim = self.run_tst_program(program)
 118             # Verified with qemu
 119             self.assertEqual(sim.gpr(1), SelectableInt(0x23, 64))
 120
 121     def test_add_compare(self):
 122         lst = ["addis 1, 0, 0xffff",
 123                "addis 2, 0, 0xffff",
 124                "add. 1, 1, 2",
 125                "mfcr 3"]
 126         with Program(lst, bigendian=False) as program:
 127             sim = self.run_tst_program(program)
 128             # Verified with QEMU
 129             self.assertEqual(sim.gpr(3), SelectableInt(0x80000000, 64))
 130
 131     def test_cmp(self):
 132         lst = ["addis 1, 0, 0xffff",
 133                "addis 2, 0, 0xffff",
 134                "cmp cr2, 0, 1, 2",
 135                "mfcr 3"]
 136         with Program(lst, bigendian=False) as program:
 137             sim = self.run_tst_program(program)
 138             self.assertEqual(sim.gpr(3), SelectableInt(0x200000, 64))
 139
 140     def test_slw(self):
 141         lst = ["slw 1, 3, 2"]
 142         initial_regs = [0] * 32
 143         initial_regs[3] = 0xdeadbeefcafebabe
 144         initial_regs[2] = 5
 145         with Program(lst, bigendian=False) as program:
 146             sim = self.run_tst_program(program, initial_regs)
 147             self.assertEqual(sim.gpr(1), SelectableInt(0x5fd757c0, 64))
 148
 149     def test_srw(self):
 150         lst = ["srw 1, 3, 2"]
 151         initial_regs = [0] * 32
 152         initial_regs[3] = 0xdeadbeefcafebabe
 153         initial_regs[2] = 5
 154         with Program(lst, bigendian=False) as program:
 155             sim = self.run_tst_program(program, initial_regs)
 156             self.assertEqual(sim.gpr(1), SelectableInt(0x657f5d5, 64))
 157
 158     def test_rlwinm(self):
 159         lst = ["rlwinm 3, 1, 5, 20, 6"]
 160         initial_regs = [0] * 32
 161         initial_regs[1] = -1
 162         with Program(lst, bigendian=False) as program:
 163             sim = self.run_tst_program(program, initial_regs)
 164             self.assertEqual(sim.gpr(3), SelectableInt(0xfffffffffe000fff, 64))
 165
 166     def test_rlwimi(self):
 167         lst = ["rlwimi 3, 1, 5, 20, 6"]
 168         initial_regs = [0] * 32
 169         initial_regs[1] = 0xffffffffdeadbeef
 170         initial_regs[3] = 0x12345678
 171         with Program(lst, bigendian=False) as program:
 172             sim = self.run_tst_program(program, initial_regs)
 173             self.assertEqual(sim.gpr(3), SelectableInt(0xd5b7ddfbd4345dfb, 64))
 174
 175     def test_rldic(self):
 176         lst = ["rldic 3, 1, 5, 20"]
 177         initial_regs = [0] * 32
 178         initial_regs[1] = 0xdeadbeefcafec0de
 179         with Program(lst, bigendian=False) as program:
 180             sim = self.run_tst_program(program, initial_regs)
 181             self.assertEqual(sim.gpr(3), SelectableInt(0xdf95fd81bc0, 64))
 182
 183     def test_prty(self):
 184         lst = ["prtyw 2, 1"]
 185         initial_regs = [0] * 32
 186         initial_regs[1] = 0xdeadbeeecaffc0de
 187         with Program(lst, bigendian=False) as program:
 188             sim = self.run_tst_program(program, initial_regs)
 189             self.assertEqual(sim.gpr(2), SelectableInt(0x100000001, 64))
 190
 191     def test_popcnt(self):
 192         lst = ["popcntb 2, 1",
 193                "popcntw 3, 1",
 194                "popcntd 4, 1"
 195                ]
 196         initial_regs = [0] * 32
 197         initial_regs[1] = 0xdeadbeefcafec0de
 198         with Program(lst, bigendian=False) as program:
 199             sim = self.run_tst_program(program, initial_regs)
 200             self.assertEqual(sim.gpr(2),
 201                              SelectableInt(0x605060704070206, 64))
 202             self.assertEqual(sim.gpr(3),
 203                              SelectableInt(0x1800000013, 64))
 204             self.assertEqual(sim.gpr(4),
 205                              SelectableInt(0x2b, 64))
 206
 207     def test_cntlz(self):
 208         lst = ["cntlzd 2, 1",
 209                "cntlzw 4, 3"]
 210         initial_regs = [0] * 32
 211         initial_regs[1] = 0x0000beeecaffc0de
 212         initial_regs[3] = 0x0000000000ffc0de
 213         with Program(lst, bigendian=False) as program:
 214             sim = self.run_tst_program(program, initial_regs)
 215             self.assertEqual(sim.gpr(2), SelectableInt(16, 64))
 216             self.assertEqual(sim.gpr(4), SelectableInt(8, 64))
 217
 218     def test_cmpeqb(self):
 219         lst = ["cmpeqb cr0, 2, 1",
 220                "cmpeqb cr1, 3, 1"]
 221         initial_regs = [0] * 32
 222         initial_regs[1] = 0x0102030405060708
 223         initial_regs[2] = 0x04
 224         initial_regs[3] = 0x10
 225         with Program(lst, bigendian=False) as program:
 226             sim = self.run_tst_program(program, initial_regs)
 227             self.assertEqual(sim.crl[0].get_range().value,
 228                              SelectableInt(4, 4))
 229             self.assertEqual(sim.crl[1].get_range().value,
 230                              SelectableInt(0, 4))
 231
 232     def test_mtcrf(self):
 233         for i in range(4):
 234             # 0x76540000 gives expected (3+4) (2+4) (1+4) (0+4) for
 235             #     i=0, 1, 2, 3
 236             # The positions of the CR fields have been verified using
 237             # QEMU and 'cmp crx, a, b' instructions
 238             lst = ["addis 1, 0, 0x7654",
 239                    "mtcrf %d, 1" % (1 << (7-i)),
 240                    ]
 241             with Program(lst, bigendian=False) as program:
 242                 sim = self.run_tst_program(program)
 243             print("cr", sim.cr)
 244             expected = (7-i)
 245             # check CR[0]/1/2/3 as well
 246             print("cr%d" % i, sim.crl[i].asint(True))
 247             self.assertTrue(SelectableInt(expected, 4) == sim.crl[i])
 248             # check CR itself
 249             self.assertEqual(sim.cr, SelectableInt(expected << ((7-i)*4), 64))
 250
 251     def run_tst_program(self, prog, initial_regs=[0] * 32):
 252         simulator = run_tst(prog, initial_regs)
 253         simulator.gpr.dump()
 254         return simulator
 255
 256
 257 if __name__ == "__main__":
 258     unittest.main()