src/openpower/decoder/isa/test_caller.py

   1 from nmutil.formaltest import FHDLTestCase
   2 import unittest
   3 from openpower.simulator.program import Program
   4 from openpower.decoder.selectable_int import SelectableInt
   5 from openpower.decoder.isa.test_runner import (Register, ISATestRunner,
   6                                               run_tst)
   7
   8
   9 class DecoderTestCase(FHDLTestCase):
  10
  11     def test_add(self):
  12         lst = ["add 1, 3, 2"]
  13         initial_regs = [0] * 32
  14         initial_regs[3] = 0x1234
  15         initial_regs[2] = 0x4321
  16         with Program(lst, bigendian=False) as program:
  17             sim = self.run_tst_program(program, initial_regs)
  18             self.assertEqual(sim.gpr(1), SelectableInt(0x5555, 64))
  19
  20     def test_addi(self):
  21         lst = ["addi 3, 0, 0x1234",
  22                "addi 2, 0, 0x4321",
  23                "add  1, 3, 2"]
  24         with Program(lst, bigendian=False) as program:
  25             sim = self.run_tst_program(program)
  26             print(sim.gpr(1))
  27             self.assertEqual(sim.gpr(1), SelectableInt(0x5555, 64))
  28
  29     def test_load_store(self):
  30         lst = ["addi 1, 0, 0x0010",
  31                "addi 2, 0, 0x1234",
  32                "stw 2, 0(1)",
  33                "lwz 3, 0(1)"]
  34         with Program(lst, bigendian=False) as program:
  35             sim = self.run_tst_program(program)
  36             print(sim.gpr(1))
  37             self.assertEqual(sim.gpr(3), SelectableInt(0x1234, 64))
  38
  39     @unittest.skip("broken")
  40     def test_addpcis(self):
  41         lst = ["addpcis 1, 0x1",
  42                "addpcis 2, 0x1",
  43                "addpcis 3, 0x1"]
  44         with Program(lst, bigendian=False) as program:
  45             sim = self.run_tst_program(program)
  46             self.assertEqual(sim.gpr(1), SelectableInt(0x10004, 64))
  47             self.assertEqual(sim.gpr(2), SelectableInt(0x10008, 64))
  48             self.assertEqual(sim.gpr(3), SelectableInt(0x1000c, 64))
  49
  50     def test_branch(self):
  51         lst = ["ba 0xc",             # branch to line 4
  52                "addi 1, 0, 0x1234",  # Should never execute
  53                "ba 0x1000",          # exit the program
  54                "addi 2, 0, 0x1234",  # line 4
  55                "ba 0x8"]             # branch to line 3
  56         with Program(lst, bigendian=False) as program:
  57             sim = self.run_tst_program(program)
  58             self.assertEqual(sim.pc.CIA, SelectableInt(0x1000, 64))
  59             self.assertEqual(sim.gpr(1), SelectableInt(0x0, 64))
  60             self.assertEqual(sim.gpr(2), SelectableInt(0x1234, 64))
  61
  62     def test_branch_link(self):
  63         lst = ["bl 0xc",
  64                "addi 2, 1, 0x1234",
  65                "ba 0x1000",
  66                "addi 1, 0, 0x1234",
  67                "bclr 20, 0, 0"]
  68         with Program(lst, bigendian=False) as program:
  69             sim = self.run_tst_program(program)
  70             self.assertEqual(sim.spr['LR'], SelectableInt(0x4, 64))
  71
  72     def test_branch_ctr(self):
  73         lst = ["addi 1, 0, 0x10",    # target of jump
  74                "mtspr 9, 1",         # mtctr 1
  75                "bcctr 20, 0, 0",     # bctr
  76                "addi 2, 0, 0x1",     # should never execute
  77                "addi 1, 0, 0x1234"]  # target of ctr
  78         with Program(lst, bigendian=False) as program:
  79             sim = self.run_tst_program(program)
  80             self.assertEqual(sim.spr['CTR'], SelectableInt(0x10, 64))
  81             self.assertEqual(sim.gpr(1), SelectableInt(0x1234, 64))
  82             self.assertEqual(sim.gpr(2), SelectableInt(0, 64))
  83
  84     def test_branch_cond(self):
  85         for i in [0, 10]:
  86             lst = [f"addi 1, 0, {i}",  # set r1 to i
  87                 "cmpi cr0, 1, 1, 10",  # compare r1 with 10 and store to cr0
  88                 "bc 12, 2, 0x8",       # beq 0x8 -
  89                                        # branch if r1 equals 10 to the nop below
  90                 "addi 2, 0, 0x1234",   # if r1 == 10 this shouldn't execute
  91                 "or 0, 0, 0"]          # branch target
  92             with Program(lst, bigendian=False) as program:
  93                 sim = self.run_tst_program(program)
  94                 if i == 10:
  95                     self.assertEqual(sim.gpr(2), SelectableInt(0, 64))
  96                 else:
  97                     self.assertEqual(sim.gpr(2), SelectableInt(0x1234, 64))
  98
  99     def test_branch_loop(self):
 100         lst = ["addi 1, 0, 0",
 101                "addi 1, 0, 0",
 102                "addi 1, 1, 1",
 103                "add  2, 2, 1",
 104                "cmpi cr0, 1, 1, 10",
 105                "bc 12, 0, -0xc"]
 106         with Program(lst, bigendian=False) as program:
 107             sim = self.run_tst_program(program)
 108             # Verified with qemu
 109             self.assertEqual(sim.gpr(2), SelectableInt(0x37, 64))
 110
 111     def test_branch_loop_ctr(self):
 112         lst = ["addi 1, 0, 0",
 113                "addi 2, 0, 7",
 114                "mtspr 9, 2",    # set ctr to 7
 115                "addi 1, 1, 5",
 116                "bc 16, 0, -0x4"]  # bdnz to the addi above
 117         with Program(lst, bigendian=False) as program:
 118             sim = self.run_tst_program(program)
 119             # Verified with qemu
 120             self.assertEqual(sim.gpr(1), SelectableInt(0x23, 64))
 121
 122
 123
 124     def test_add_compare(self):
 125         lst = ["addis 1, 0, 0xffff",
 126                "addis 2, 0, 0xffff",
 127                "add. 1, 1, 2",
 128                "mfcr 3"]
 129         with Program(lst, bigendian=False) as program:
 130             sim = self.run_tst_program(program)
 131             # Verified with QEMU
 132             self.assertEqual(sim.gpr(3), SelectableInt(0x80000000, 64))
 133
 134     def test_cmp(self):
 135         lst = ["addis 1, 0, 0xffff",
 136                "addis 2, 0, 0xffff",
 137                "cmp cr2, 0, 1, 2",
 138                "mfcr 3"]
 139         with Program(lst, bigendian=False) as program:
 140             sim = self.run_tst_program(program)
 141             self.assertEqual(sim.gpr(3), SelectableInt(0x200000, 64))
 142
 143     def test_slw(self):
 144         lst = ["slw 1, 3, 2"]
 145         initial_regs = [0] * 32
 146         initial_regs[3] = 0xdeadbeefcafebabe
 147         initial_regs[2] = 5
 148         with Program(lst, bigendian=False) as program:
 149             sim = self.run_tst_program(program, initial_regs)
 150             self.assertEqual(sim.gpr(1), SelectableInt(0x5fd757c0, 64))
 151
 152     def test_srw(self):
 153         lst = ["srw 1, 3, 2"]
 154         initial_regs = [0] * 32
 155         initial_regs[3] = 0xdeadbeefcafebabe
 156         initial_regs[2] = 5
 157         with Program(lst, bigendian=False) as program:
 158             sim = self.run_tst_program(program, initial_regs)
 159             self.assertEqual(sim.gpr(1), SelectableInt(0x657f5d5, 64))
 160
 161     def test_rlwinm(self):
 162         lst = ["rlwinm 3, 1, 5, 20, 6"]
 163         initial_regs = [0] * 32
 164         initial_regs[1] = -1
 165         with Program(lst, bigendian=False) as program:
 166             sim = self.run_tst_program(program, initial_regs)
 167             self.assertEqual(sim.gpr(3), SelectableInt(0xfffffffffe000fff, 64))
 168
 169     def test_rlwimi(self):
 170         lst = ["rlwimi 3, 1, 5, 20, 6"]
 171         initial_regs = [0] * 32
 172         initial_regs[1] = 0xffffffffdeadbeef
 173         initial_regs[3] = 0x12345678
 174         with Program(lst, bigendian=False) as program:
 175             sim = self.run_tst_program(program, initial_regs)
 176             self.assertEqual(sim.gpr(3), SelectableInt(0xd5b7ddfbd4345dfb, 64))
 177
 178     def test_rldic(self):
 179         lst = ["rldic 3, 1, 5, 20"]
 180         initial_regs = [0] * 32
 181         initial_regs[1] = 0xdeadbeefcafec0de
 182         with Program(lst, bigendian=False) as program:
 183             sim = self.run_tst_program(program, initial_regs)
 184             self.assertEqual(sim.gpr(3), SelectableInt(0xdf95fd81bc0, 64))
 185
 186     def test_prty(self):
 187         lst = ["prtyw 2, 1"]
 188         initial_regs = [0] * 32
 189         initial_regs[1] = 0xdeadbeeecaffc0de
 190         with Program(lst, bigendian=False) as program:
 191             sim = self.run_tst_program(program, initial_regs)
 192             self.assertEqual(sim.gpr(2), SelectableInt(0x100000001, 64))
 193
 194     def test_popcnt(self):
 195         lst = ["popcntb 2, 1",
 196                "popcntw 3, 1",
 197                "popcntd 4, 1"
 198         ]
 199         initial_regs = [0] * 32
 200         initial_regs[1] = 0xdeadbeefcafec0de
 201         with Program(lst, bigendian=False) as program:
 202             sim = self.run_tst_program(program, initial_regs)
 203             self.assertEqual(sim.gpr(2),
 204                              SelectableInt(0x605060704070206, 64))
 205             self.assertEqual(sim.gpr(3),
 206                              SelectableInt(0x1800000013, 64))
 207             self.assertEqual(sim.gpr(4),
 208                              SelectableInt(0x2b, 64))
 209
 210     def test_cntlz(self):
 211         lst = ["cntlzd 2, 1",
 212                "cntlzw 4, 3"]
 213         initial_regs = [0] * 32
 214         initial_regs[1] = 0x0000beeecaffc0de
 215         initial_regs[3] = 0x0000000000ffc0de
 216         with Program(lst, bigendian=False) as program:
 217             sim = self.run_tst_program(program, initial_regs)
 218             self.assertEqual(sim.gpr(2), SelectableInt(16, 64))
 219             self.assertEqual(sim.gpr(4), SelectableInt(8, 64))
 220
 221     def test_cmpeqb(self):
 222         lst = ["cmpeqb cr0, 2, 1",
 223                "cmpeqb cr1, 3, 1"]
 224         initial_regs = [0] * 32
 225         initial_regs[1] = 0x0102030405060708
 226         initial_regs[2] = 0x04
 227         initial_regs[3] = 0x10
 228         with Program(lst, bigendian=False) as program:
 229             sim = self.run_tst_program(program, initial_regs)
 230             self.assertEqual(sim.crl[0].get_range().value,
 231                              SelectableInt(4, 4))
 232             self.assertEqual(sim.crl[1].get_range().value,
 233                              SelectableInt(0, 4))
 234
 235
 236
 237     def test_mtcrf(self):
 238         for i in range(4):
 239             # 0x76540000 gives expected (3+4) (2+4) (1+4) (0+4) for
 240             #     i=0, 1, 2, 3
 241             # The positions of the CR fields have been verified using
 242             # QEMU and 'cmp crx, a, b' instructions
 243             lst = ["addis 1, 0, 0x7654",
 244                    "mtcrf %d, 1" % (1 << (7-i)),
 245                    ]
 246             with Program(lst, bigendian=False) as program:
 247                 sim = self.run_tst_program(program)
 248             print("cr", sim.cr)
 249             expected = (7-i)
 250             # check CR[0]/1/2/3 as well
 251             print("cr%d" % i, sim.crl[i].asint(True))
 252             self.assertTrue(SelectableInt(expected, 4) == sim.crl[i])
 253             # check CR itself
 254             self.assertEqual(sim.cr, SelectableInt(expected << ((7-i)*4), 64))
 255
 256     def run_tst_program(self, prog, initial_regs=[0] * 32):
 257         simulator = run_tst(prog, initial_regs)
 258         simulator.gpr.dump()
 259         return simulator
 260
 261
 262 if __name__ == "__main__":
 263     unittest.main()