got cos intermediate working on iterative dct
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_fp.py
1 from nmigen import Module, Signal
2 from nmigen.back.pysim import Simulator, Delay, Settle
3 from nmutil.formaltest import FHDLTestCase
4 import unittest
5 from openpower.decoder.isa.caller import ISACaller
6 from openpower.decoder.power_decoder import (create_pdecode)
7 from openpower.decoder.power_decoder2 import (PowerDecode2)
8 from openpower.simulator.program import Program
9 from openpower.decoder.isa.caller import ISACaller, SVP64State
10 from openpower.decoder.selectable_int import SelectableInt
11 from openpower.decoder.orderedset import OrderedSet
12 from openpower.decoder.isa.all import ISA
13 from openpower.decoder.isa.test_caller import Register, run_tst
14 from copy import deepcopy
15
16
17 class DecoderTestCase(FHDLTestCase):
18
19 def _check_regs(self, sim, expected_int, expected_fpr):
20 for i in range(32):
21 self.assertEqual(sim.gpr(i), SelectableInt(expected[i], 64))
22 for i in range(32):
23 self.assertEqual(sim.fpr(i), SelectableInt(expected_fpr[i], 64))
24
25 def test_fpload(self):
26 """>>> lst = ["lfsx 1, 0, 0",
27 ]
28 """
29 lst = ["lfsx 1, 0, 0",
30 ]
31 initial_mem = {0x0000: (0x42013333, 8),
32 0x0008: (0x42026666, 8),
33 0x0020: (0x1828384822324252, 8),
34 }
35
36 with Program(lst, bigendian=False) as program:
37 sim = self.run_tst_program(program, initial_mem=initial_mem)
38 print("FPR 1", sim.fpr(1))
39 self.assertEqual(sim.fpr(1), SelectableInt(0x4040266660000000, 64))
40
41 def test_fpload2(self):
42 """>>> lst = ["lfsx 1, 0, 0",
43 ]
44 """
45 lst = ["lfsx 1, 0, 0",
46 ]
47 initial_mem = {0x0000: (0xac000000, 8),
48 0x0020: (0x1828384822324252, 8),
49 }
50
51 with Program(lst, bigendian=False) as program:
52 sim = self.run_tst_program(program, initial_mem=initial_mem)
53 print("FPR 1", sim.fpr(1))
54 self.assertEqual(sim.fpr(1), SelectableInt(0xbd80000000000000, 64))
55
56 def test_fp_single_ldst(self):
57 """>>> lst = ["lfsx 1, 1, 0", # load fp 1 from mem location 0
58 "stfsu 1, 16(1)", # store fp 1 into mem 0x10, update RA
59 "lfsu 2, 0(1)", # re-load from UPDATED r1
60 ]
61 """
62 lst = ["lfsx 1, 1, 0",
63 "stfsu 1, 16(1)",
64 "lfs 2, 0(1)",
65 ]
66 initial_mem = {0x0000: (0x42013333, 8),
67 0x0008: (0x42026666, 8),
68 0x0020: (0x1828384822324252, 8),
69 }
70
71 with Program(lst, bigendian=False) as program:
72 sim = self.run_tst_program(program, initial_mem=initial_mem)
73 print("FPR 1", sim.fpr(1))
74 print("FPR 2", sim.fpr(2))
75 print("GPR 1", sim.gpr(1)) # should be 0x10 due to update
76 self.assertEqual(sim.gpr(1), SelectableInt(0x10, 64))
77 self.assertEqual(sim.fpr(1), SelectableInt(0x4040266660000000, 64))
78 self.assertEqual(sim.fpr(2), SelectableInt(0x4040266660000000, 64))
79
80 def test_fp_mv(self):
81 """>>> lst = ["fmr 1, 2",
82 ]
83 """
84 lst = ["fmr 1, 2",
85 ]
86
87 fprs = [0] * 32
88 fprs[2] = 0x4040266660000000
89
90 with Program(lst, bigendian=False) as program:
91 sim = self.run_tst_program(program, initial_fprs=fprs)
92 print("FPR 1", sim.fpr(1))
93 print("FPR 2", sim.fpr(2))
94 self.assertEqual(sim.fpr(1), SelectableInt(0x4040266660000000, 64))
95 self.assertEqual(sim.fpr(2), SelectableInt(0x4040266660000000, 64))
96
97 def test_fp_neg(self):
98 """>>> lst = ["fneg 1, 2",
99 ]
100 """
101 lst = ["fneg 1, 2",
102 ]
103
104 fprs = [0] * 32
105 fprs[2] = 0x4040266660000000
106
107 with Program(lst, bigendian=False) as program:
108 sim = self.run_tst_program(program, initial_fprs=fprs)
109 print("FPR 1", sim.fpr(1))
110 print("FPR 2", sim.fpr(2))
111 self.assertEqual(sim.fpr(1), SelectableInt(0xC040266660000000, 64))
112 self.assertEqual(sim.fpr(2), SelectableInt(0x4040266660000000, 64))
113
114 def test_fp_abs(self):
115 """>>> lst = ["fabs 3, 1",
116 "fabs 4, 2",
117 "fnabs 5, 1",
118 "fnabs 6, 2",
119 ]
120 """
121 lst = ["fabs 3, 1",
122 "fabs 4, 2",
123 "fnabs 5, 1",
124 "fnabs 6, 2",
125 ]
126
127 fprs = [0] * 32
128 fprs[1] = 0xC040266660000000
129 fprs[2] = 0x4040266660000000
130
131 with Program(lst, bigendian=False) as program:
132 sim = self.run_tst_program(program, initial_fprs=fprs)
133 self.assertEqual(sim.fpr(1), SelectableInt(0xC040266660000000, 64))
134 self.assertEqual(sim.fpr(2), SelectableInt(0x4040266660000000, 64))
135 self.assertEqual(sim.fpr(3), SelectableInt(0x4040266660000000, 64))
136 self.assertEqual(sim.fpr(4), SelectableInt(0x4040266660000000, 64))
137 self.assertEqual(sim.fpr(5), SelectableInt(0xC040266660000000, 64))
138 self.assertEqual(sim.fpr(6), SelectableInt(0xC040266660000000, 64))
139
140 def test_fp_sgn(self):
141 """>>> lst = ["fcpsgn 3, 1, 2",
142 "fcpsgn 4, 2, 1",
143 ]
144 """
145 lst = ["fcpsgn 3, 1, 2",
146 "fcpsgn 4, 2, 1",
147 ]
148
149 fprs = [0] * 32
150 fprs[1] = 0xC040266660000001 # 1 in LSB, 1 in MSB
151 fprs[2] = 0x4040266660000000 # 0 in LSB, 0 in MSB
152
153 with Program(lst, bigendian=False) as program:
154 sim = self.run_tst_program(program, initial_fprs=fprs)
155 self.assertEqual(sim.fpr(1), SelectableInt(0xC040266660000001, 64))
156 self.assertEqual(sim.fpr(2), SelectableInt(0x4040266660000000, 64))
157 # 1 in MSB comes from reg 1, 0 in LSB comes from reg 2
158 self.assertEqual(sim.fpr(3), SelectableInt(0xC040266660000000, 64))
159 # 0 in MSB comes from reg 2, 1 in LSB comes from reg 1
160 self.assertEqual(sim.fpr(4), SelectableInt(0x4040266660000001, 64))
161
162 def test_fp_adds(self):
163 """>>> lst = ["fadds 3, 1, 2",
164 ]
165 """
166 lst = ["fadds 3, 1, 2", # -32.3 + 32.3 = 0
167 ]
168
169 fprs = [0] * 32
170 fprs[1] = 0xC040266660000000
171 fprs[2] = 0x4040266660000000
172
173 with Program(lst, bigendian=False) as program:
174 sim = self.run_tst_program(program, initial_fprs=fprs)
175 self.assertEqual(sim.fpr(1), SelectableInt(0xC040266660000000, 64))
176 self.assertEqual(sim.fpr(2), SelectableInt(0x4040266660000000, 64))
177 self.assertEqual(sim.fpr(3), SelectableInt(0, 64))
178
179 def test_fp_add(self):
180 """>>> lst = ["fadd 3, 1, 2",
181 ]
182 """
183 lst = ["fadd 3, 1, 2", # 7.0 + -9.8 = -2.8
184 ]
185
186 fprs = [0] * 32
187 fprs[1] = 0x401C000000000000 # 7.0
188 fprs[2] = 0xC02399999999999A # -9.8
189
190 with Program(lst, bigendian=False) as program:
191 sim = self.run_tst_program(program, initial_fprs=fprs)
192 self.assertEqual(sim.fpr(1), SelectableInt(0x401C000000000000, 64))
193 self.assertEqual(sim.fpr(2), SelectableInt(0xC02399999999999A, 64))
194 self.assertEqual(sim.fpr(3), SelectableInt(0xC006666666666668, 64))
195
196 def test_fp_muls(self):
197 """>>> lst = ["fmuls 3, 1, 2",
198 ]
199 """
200 lst = ["fmuls 3, 1, 2", # 7.0 * -9.8 = -68.6
201 "fmuls 29,12,8", # test
202 ]
203
204 fprs = [0] * 32
205 fprs[1] = 0x401C000000000000 # 7.0
206 fprs[2] = 0xC02399999999999A # -9.8
207
208 with Program(lst, bigendian=False) as program:
209 sim = self.run_tst_program(program, initial_fprs=fprs)
210 self.assertEqual(sim.fpr(1), SelectableInt(0x401C000000000000, 64))
211 self.assertEqual(sim.fpr(2), SelectableInt(0xC02399999999999A, 64))
212 self.assertEqual(sim.fpr(3), SelectableInt(0xc051266640000000, 64))
213
214 def test_fp_muls3(self):
215 """>>> lst = ["fmuls 3, 1, 2",
216 ]
217 """
218 lst = ["fmuls 3, 1, 2", #
219 ]
220
221 fprs = [0] * 32
222 fprs[1] = 0xbfb0ab5100000000
223 fprs[2] = 0xbdca000000000000
224
225 with Program(lst, bigendian=False) as program:
226 sim = self.run_tst_program(program, initial_fprs=fprs)
227 self.assertEqual(sim.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
228
229 def test_fp_muls4(self):
230 """>>> lst = ["fmuls 3, 1, 2",
231 ]
232 """
233 lst = ["fmuls 3, 1, 2", #
234 ]
235
236 fprs = [0] * 32
237 fprs[1] = 0xbe724e2000000000 # negative number
238 fprs[2] = 0x0 # times zero
239
240 with Program(lst, bigendian=False) as program:
241 sim = self.run_tst_program(program, initial_fprs=fprs)
242 # result should be -ve zero not +ve zero
243 self.assertEqual(sim.fpr(3), SelectableInt(0x8000000000000000, 64))
244
245 def test_fp_muls5(self):
246 """>>> lst = ["fmuls 3, 1, 2",
247 ]
248 """
249 lst = ["fmuls 3, 1, 2", #
250 ]
251
252 fprs = [0] * 32
253 fprs[1] = 0xbfb0ab5100000000
254 fprs[2] = 0xbdca000000000000
255
256 with Program(lst, bigendian=False) as program:
257 sim = self.run_tst_program(program, initial_fprs=fprs)
258 self.assertEqual(sim.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
259
260 def test_fp_mul(self):
261 """>>> lst = ["fmul 3, 1, 2",
262 ]
263 """
264 lst = ["fmul 3, 1, 2", # 7.0 * -9.8 = -68.6
265 ]
266
267 fprs = [0] * 32
268 fprs[1] = 0x401C000000000000 # 7.0
269 fprs[2] = 0xC02399999999999A # -9.8
270
271 with Program(lst, bigendian=False) as program:
272 sim = self.run_tst_program(program, initial_fprs=fprs)
273 self.assertEqual(sim.fpr(1), SelectableInt(0x401C000000000000, 64))
274 self.assertEqual(sim.fpr(2), SelectableInt(0xC02399999999999A, 64))
275 self.assertEqual(sim.fpr(3), SelectableInt(0xC051266666666667, 64))
276
277 def test_fp_madd1(self):
278 """>>> lst = ["fmadds 3, 1, 2, 4",
279 ]
280 """
281 lst = ["fmadds 3, 1, 2, 4", # 7.0 * -9.8 + 2 = -66.6
282 ]
283
284 fprs = [0] * 32
285 fprs[1] = 0x401C000000000000 # 7.0
286 fprs[2] = 0xC02399999999999A # -9.8
287 fprs[4] = 0x4000000000000000 # 2.0
288
289 with Program(lst, bigendian=False) as program:
290 sim = self.run_tst_program(program, initial_fprs=fprs)
291 self.assertEqual(sim.fpr(3), SelectableInt(0xC050A66660000000, 64))
292
293 def test_fp_msub1(self):
294 """>>> lst = ["fmsubs 3, 1, 2, 4",
295 ]
296 """
297 lst = ["fmsubs 3, 1, 2, 4", # 7.0 * -9.8 + 2 = -70.6
298 ]
299
300 fprs = [0] * 32
301 fprs[1] = 0x401C000000000000 # 7.0
302 fprs[2] = 0xC02399999999999A # -9.8
303 fprs[4] = 0x4000000000000000 # 2.0
304
305 with Program(lst, bigendian=False) as program:
306 sim = self.run_tst_program(program, initial_fprs=fprs)
307 self.assertEqual(sim.fpr(3), SelectableInt(0xc051a66660000000, 64))
308
309 def test_fp_fcfids(self):
310 """>>> lst = ["fcfids 1, 2",
311 lst = ["fcfids 3, 4",
312 ]
313 """
314 lst = ["fcfids 1, 2",
315 "fcfids 3, 4",
316 ]
317
318 fprs = [0] * 32
319 fprs[2] = 7
320 fprs[4] = -32
321
322 with Program(lst, bigendian=False) as program:
323 sim = self.run_tst_program(program, initial_fprs=fprs)
324 self.assertEqual(sim.fpr(1), SelectableInt(0x401C000000000000, 64))
325 self.assertEqual(sim.fpr(2), SelectableInt(7, 64))
326 self.assertEqual(sim.fpr(3), SelectableInt(0xC040000000000000, 64))
327 self.assertEqual(sim.fpr(4), SelectableInt(-32, 64))
328
329 def run_tst_program(self, prog, initial_regs=None,
330 initial_mem=None,
331 initial_fprs=None):
332 if initial_regs is None:
333 initial_regs = [0] * 32
334 simulator = run_tst(prog, initial_regs, mem=initial_mem,
335 initial_fprs=initial_fprs)
336 print ("GPRs")
337 simulator.gpr.dump()
338 print ("FPRs")
339 simulator.fpr.dump()
340 return simulator
341
342
343 if __name__ == "__main__":
344 unittest.main()