add in privileged instruction decision-making in PowerDecode2
[soc.git] / src / soc / fu / README.md
1 # Pipelines
2
3 In this directory are the pipelines. The structure of each pipeline is
4 as follows:
5
6 * pipe_data.py: contains pipeline input and output data structures
7 * XXXX_stage.py: files with function-specific stages
8 * XXX_input_record.py: a PowerISA decoded instruction subset for this pipeline
9 * pipeline.py: the actual pipeline chain, which brings all stages together
10
11 # Computation Units
12
13 A subdirectory named compunits contains the 6600 style "Comp Units".
14 These are pipeline managers whose sole job is to monitor the operation
15 in its entirety from start to finish, including receiving of all
16 operands and the storage of all results. AT NO TIME does a Comp Unit
17 "abandon" data to a pipeline.
18
19 Each pipeline is given a Como Umit frontend. The base class uses regsoecs
20 to construct the required latches in order to send and receive dsta to
21 and from the required Register Files.
22
23 # Common files
24
25 * regspec.py: the register specification API. used by each pipe_data.py
26 * pipe_data.py: base class for pipeline pipe_data.py data structures
27 * common_input_stage.py: functionality common to input stages (RA, RB)
28 * common_output_stage.py: functionality common to output stages (SO, CA/32 etc.)