add SVP64 RM fields to ALU input record
[soc.git] / src / soc / fu / alu / alu_input_record.py
1 from soc.fu.base_input_record import CompOpSubsetBase
2 from openpower.decoder.power_enums import MicrOp, Function, CryIn
3 from nmigen.hdl.rec import Layout
4
5 # needed for SVP64 information at the pipeline
6 from openpower.decoder.power_svp64_rm import sv_input_record_layout
7
8 class CompALUOpSubset(CompOpSubsetBase):
9 """CompALUOpSubset
10
11 a copy of the relevant subset information from Decode2Execute1Type
12 needed for ALU operations. use with eq_from_execute1 (below) to
13 grab subsets.
14 """
15 def __init__(self, name=None):
16 layout = [('insn_type', MicrOp),
17 ('fn_unit', Function),
18 ('imm_data', Layout((("data", 64), ("ok", 1)))),
19 ('rc', Layout((("rc", 1), ("ok", 1)))), # Data
20 ('oe', Layout((("oe", 1), ("ok", 1)))), # Data
21 ('invert_in', 1),
22 ('zero_a', 1),
23 ('invert_out', 1),
24 ('write_cr0', 1),
25 ('input_carry', CryIn),
26 ('output_carry', 1),
27 ('is_32bit', 1),
28 ('is_signed', 1),
29 ('data_len', 4), # actually used by ALU, in OP_EXTS
30 ('insn', 32),
31 ] + sv_input_record_layout
32 super().__init__(layout, name=name)
33