2 from openpower
.decoder
.power_enums
import (XER_bits
, Function
)
4 from soc
.fu
.branch
.test
.test_pipe_caller
import BranchTestCase
, get_cu_inputs
6 from soc
.fu
.compunits
.compunits
import BranchFunctionUnit
7 from soc
.fu
.compunits
.test
.test_compunit
import TestRunner
8 from openpower
.endian
import bigendian
12 def assert_outputs(self, branch, dec2, sim, prev_nia, code):
16 class BranchTestRunner(TestRunner
):
17 def __init__(self
, test_data
):
18 super().__init
__(test_data
, BranchFunctionUnit
, self
,
19 Function
.BRANCH
, bigendian
)
21 def get_cu_inputs(self
, dec2
, sim
):
22 """naming (res) must conform to BranchFunctionUnit input regspec
24 res
= yield from get_cu_inputs(dec2
, sim
)
27 def check_cu_outputs(self
, res
, dec2
, sim
, alu
, code
):
28 """naming (res) must conform to BranchFunctionUnit output regspec
31 print("check extra output", repr(code
), res
)
33 # NIA (next instruction address aka PC)
34 branch_taken
= 'nia' in res
35 # TODO - get the old PC, use it to check if the branch was taken
36 # sim_branch_taken = prev_nia != sim.pc.CIA
37 # self.assertEqual(branch_taken, sim_branch_taken, code)
39 branch_addr
= res
['nia']
40 self
.assertEqual(branch_addr
, sim
.pc
.CIA
.value
, code
)
43 lk
= yield dec2
.e
.do
.lk
44 branch_lk
= 'fast2' in res
45 self
.assertEqual(lk
, branch_lk
, code
)
47 branch_lr
= res
['fast2']
48 self
.assertEqual(sim
.spr
['LR'], branch_lr
, code
)
51 ctr_ok
= 'fast1' in res
54 self
.assertEqual(sim
.spr
['CTR'], ctr
, code
)
57 if __name__
== "__main__":
58 unittest
.main(exit
=False)
59 suite
= unittest
.TestSuite()
60 suite
.addTest(BranchTestRunner(BranchTestCase().test_data
))
62 runner
= unittest
.TextTestRunner()