src/soc/fu/compunits/test/test_branch_compunit.py

   1 import unittest
   2 from soc.decoder.power_enums import (XER_bits, Function, spr_dict, SPR)
   3
   4 # XXX bad practice: use of global variables
   5 from soc.fu.branch.test.test_pipe_caller import BranchTestCase
   6 from soc.fu.branch.test.test_pipe_caller import test_data
   7
   8 from soc.fu.compunits.compunits import BranchFunctionUnit
   9 from soc.fu.compunits.test.test_compunit import TestRunner
  10
  11 from soc.regfile.regfiles import FastRegs
  12
  13 """
  14     def assert_outputs(self, branch, dec2, sim, prev_nia, code):
  15 """
  16
  17 def fast_reg_to_spr(spr_num):
  18     if spr_num == FastRegs.CTR:
  19         return SPR.CTR.value
  20     elif spr_num == FastRegs.LR:
  21         return SPR.LR.value
  22     elif spr_num == FastRegs.TAR:
  23         return SPR.TAR.value
  24
  25
  26 class BranchTestRunner(TestRunner):
  27     def __init__(self, test_data):
  28         super().__init__(test_data, BranchFunctionUnit, self,
  29                          Function.BRANCH)
  30
  31     def get_cu_inputs(self, dec2, sim):
  32         """naming (res) must conform to BranchFunctionUnit input regspec
  33         """
  34         res = {}
  35         full_reg = yield dec2.e.read_cr_whole
  36
  37         # CIA (PC)
  38         res['cia'] = sim.pc.CIA.value
  39         # CR A
  40         cr1_en = yield dec2.e.read_cr1.ok
  41         if cr1_en:
  42             cr1_sel = yield dec2.e.read_cr1.data
  43             res['cr_a'] = sim.crl[cr1_sel].get_range().value
  44
  45         # SPR1
  46         spr_ok = yield dec2.e.read_spr1.ok
  47         spr_num = yield dec2.e.read_spr1.data
  48         # HACK
  49         spr_num = fast_reg_to_spr(spr_num)
  50         if spr_ok:
  51             res['spr1'] = sim.spr[spr_dict[spr_num].SPR].value
  52
  53         # SPR2
  54         spr_ok = yield dec2.e.read_spr2.ok
  55         spr_num = yield dec2.e.read_spr2.data
  56         # HACK
  57         spr_num = fast_reg_to_spr(spr_num)
  58         if spr_ok:
  59             res['spr2'] = sim.spr[spr_dict[spr_num].SPR].value
  60
  61         print ("get inputs", res)
  62         return res
  63
  64     def check_cu_outputs(self, res, dec2, sim, code):
  65         """naming (res) must conform to BranchFunctionUnit output regspec
  66         """
  67
  68         print ("check extra output", repr(code), res)
  69
  70         # NIA (next instruction address aka PC)
  71         branch_taken = 'nia' in res
  72         # TODO - get the old PC, use it to check if the branch was taken
  73         #     sim_branch_taken = prev_nia != sim.pc.CIA
  74         #     self.assertEqual(branch_taken, sim_branch_taken, code)
  75         if branch_taken:
  76             branch_addr = res['nia']
  77             self.assertEqual(branch_addr, sim.pc.CIA.value, code)
  78
  79         # Link SPR
  80         lk = yield dec2.e.lk
  81         branch_lk = 'spr2' in res
  82         self.assertEqual(lk, branch_lk, code)
  83         if lk:
  84             branch_lr = res['spr2']
  85             self.assertEqual(sim.spr['LR'], branch_lr, code)
  86
  87         # CTR SPR
  88         ctr_ok = 'spr1' in res
  89         if ctr_ok:
  90             ctr = res['spr1']
  91             self.assertEqual(sim.spr['CTR'], ctr, code)
  92
  93
  94 if __name__ == "__main__":
  95     unittest.main(exit=False)
  96     suite = unittest.TestSuite()
  97     suite.addTest(BranchTestRunner(test_data))
  98
  99     runner = unittest.TextTestRunner()
 100     runner.run(suite)