add minerva source from https://github.com/lambdaconcept/minerva
[soc.git] / src / soc / minerva / units / debug / dmi.py
1 from enum import Enum
2
3
4 __all__ = [
5 "Version", "Command", "Error", "RegMode", "DmiOp", "DebugReg", "dmstatus_layout",
6 "dmcontrol_layout", "abstractcs_layout", "cmd_access_reg_layout", "command_layout",
7 "sbcs_layout", "flat_layout"
8 ]
9
10
11 class Version:
12 NONE = 0
13 V011 = 1
14 V013 = 2
15 OTHER = 15
16
17
18 class Command:
19 ACCESS_REG = 0
20 QUICK_ACCESS = 1
21 ACCESS_MEM = 2
22
23
24 class Error:
25 NONE = 0
26 BUSY = 1
27 UNSUPPORTED = 2
28 EXCEPTION = 3
29 HALT_RESUME = 4
30
31
32 RegMode = Enum("RegMode", ("R", "W", "W1", "RW", "RW1C", "WARL"))
33
34
35 class DmiOp:
36 NOP = 0
37 READ = 1
38 WRITE = 2
39
40
41 # Debug registers
42
43 class DebugReg:
44 DATA0 = 0x04
45 DMCONTROL = 0x10
46 DMSTATUS = 0x11
47 HARTINFO = 0x12
48 ABSTRACTCS = 0x16
49 COMMAND = 0x17
50 PROGBUF0 = 0x20
51 SBCS = 0x38
52 SBADDRESS0 = 0x39
53 SBDATA0 = 0x3c
54
55
56 dmstatus_layout = [
57 ("version", 4, RegMode.R, Version.V013),
58 ("confstrptrvalid", 1, RegMode.R, False),
59 ("hasresethaltreq", 1, RegMode.R, False),
60 ("authbusy", 1, RegMode.R, False),
61 ("authenticated", 1, RegMode.R, True),
62 ("anyhalted", 1, RegMode.R, False),
63 ("allhalted", 1, RegMode.R, False),
64 ("anyrunning", 1, RegMode.R, False),
65 ("allrunning", 1, RegMode.R, False),
66 ("anyunavail", 1, RegMode.R, False),
67 ("allunavail", 1, RegMode.R, False),
68 ("anynonexistent", 1, RegMode.R, False),
69 ("allnonexistent", 1, RegMode.R, False),
70 ("anyresumeack", 1, RegMode.R, False),
71 ("allresumeack", 1, RegMode.R, False),
72 ("anyhavereset", 1, RegMode.R, False),
73 ("allhavereset", 1, RegMode.R, False),
74 ("zero0", 2, RegMode.R, 0),
75 ("impebreak", 1, RegMode.R, False),
76 ("zero1", 9, RegMode.R, 0)
77 ]
78
79
80 dmcontrol_layout = [
81 ("dmactive", 1, RegMode.RW, False),
82 ("ndmreset", 1, RegMode.RW, False),
83 ("clrresethaltreq", 1, RegMode.W1, False),
84 ("setresethaltreq", 1, RegMode.W1, False),
85 ("zero0", 2, RegMode.R, 0),
86 ("hartselhi", 10, RegMode.RW, 0),
87 ("hartsello", 10, RegMode.RW, 0),
88 ("hasel", 1, RegMode.RW, False),
89 ("zero1", 1, RegMode.R, 0),
90 ("ackhavereset", 1, RegMode.W1, False),
91 ("hartreset", 1, RegMode.RW, False),
92 ("resumereq", 1, RegMode.W1, False),
93 ("haltreq", 1, RegMode.W, False)
94 ]
95
96
97 abstractcs_layout = [
98 ("datacount", 4, RegMode.R, 1),
99 ("zero0", 4, RegMode.R, 0),
100 ("cmderr", 3, RegMode.RW1C, 0),
101 ("zero1", 1, RegMode.R, 0),
102 ("busy", 1, RegMode.R, False),
103 ("zero2", 11, RegMode.R, 0),
104 ("progbufsize", 5, RegMode.R, 0),
105 ("zero3", 3, RegMode.R, 0)
106 ]
107
108
109 cmd_access_reg_layout = [
110 ("regno", 16),
111 ("write", 1),
112 ("transfer", 1),
113 ("postexec", 1),
114 ("aarpostincrement", 1),
115 ("aarsize", 3),
116 ("zero0", 1),
117 ]
118
119
120 command_layout = [
121 ("control", 24, RegMode.W, 0),
122 ("cmdtype", 8, RegMode.W, Command.ACCESS_REG)
123 ]
124
125
126 sbcs_layout = [
127 ("sbaccess8", 1, RegMode.R, True),
128 ("sbaccess16", 1, RegMode.R, True),
129 ("sbaccess32", 1, RegMode.R, True),
130 ("sbaccess64", 1, RegMode.R, False),
131 ("sbaccess128", 1, RegMode.R, False),
132 ("sbasize", 7, RegMode.R, 32),
133 ("sberror", 3, RegMode.RW1C, 0),
134 ("sbreadondata", 1, RegMode.RW, False),
135 ("sbautoincrement", 1, RegMode.RW, False),
136 ("sbaccess", 3, RegMode.RW, 2),
137 ("sbreadonaddr", 1, RegMode.RW, False),
138 ("sbbusy", 1, RegMode.R, False),
139 ("sbbusyerror", 1, RegMode.RW1C, False),
140 ("zero0", 6, RegMode.R, 0),
141 ("sbversion", 3, RegMode.R, 1)
142 ]
143
144
145 flat_layout = [
146 ("value", 32, RegMode.RW, 0)
147 ]