2 from nmigen
.build
.dsl
import Resource
, Subsignal
, Pins
3 from nmigen
.build
.plat
import TemplatedPlatform
4 from nmigen
import Elaboratable
, Signal
, Module
6 # Was thinking of using these functions, but skipped for simplicity for now
7 # XXX nope. the output from JSON file.
8 #from pinfunctions import (i2s, lpc, emmc, sdmmc, mspi, mquadspi, spi,
9 # quadspi, i2c, mi2c, jtag, uart, uartfull, rgbttl, ulpi, rgmii, flexbus1,
10 # flexbus2, sdram1, sdram2, sdram3, vss, vdd, sys, eint, pwm, gpio)
12 # File for stage 1 pinmux tested proposed by Luke,
13 # https://bugs.libre-soc.org/show_bug.cgi?id=50#c10
17 # sigh this needs to come from pinmux.
20 gpios
.append("%d*" % i
)
21 return {'uart': ['tx+', 'rx-'],
23 'i2c': ['sda*', 'scl+']}
26 a function is needed which turns the results of dummy_pinset()
29 [UARTResource("uart", 0, tx=..., rx=..),
30 I2CResource("i2c", 0, scl=..., sda=...),
31 Resource("gpio", 0, Subsignal("i"...), Subsignal("o"...)
32 Resource("gpio", 1, Subsignal("i"...), Subsignal("o"...)
38 def create_resources(pinset
):
40 for periph
, pins
in pinset
.items():
43 #print("I2C required!")
44 resources
.append(I2CResource('i2c', 0, sda
='sda', scl
='scl'))
45 elif periph
== 'uart':
46 #print("UART required!")
47 resources
.append(UARTResource('uart', 0, tx
='tx', rx
='rx'))
48 elif periph
== 'gpio':
49 #print("GPIO required!")
50 print ("GPIO is defined as '*' type, meaning i, o and oe needed")
51 resources
.append(Resource('gpio', 0,
52 Subsignal("i", Pins('i0', dir="i", conn
=None, assert_width
=1)),
53 Subsignal("oe", Pins('oe0', dir="o", conn
=None, assert_width
=1)),
54 Subsignal("o", Pins('o0', dir="o", conn
=None, assert_width
=1))))
58 def UARTResource(*args
, rx
, tx
):
60 io
.append(Subsignal("rx", Pins(rx
, dir="i", assert_width
=1)))
61 io
.append(Subsignal("tx", Pins(tx
, dir="o", assert_width
=1)))
62 return Resource
.family(*args
, default_name
="uart", ios
=io
)
65 def I2CResource(*args
, scl
, sda
):
67 io
.append(Subsignal("scl", Pins(scl
, dir="io", assert_width
=1)))
68 io
.append(Subsignal("sda", Pins(sda
, dir="io", assert_width
=1)))
69 return Resource
.family(*args
, default_name
="i2c", ios
=io
)
72 # ridiculously-simple top-level module. doesn't even have a sync domain
73 # and can't have one until a clock has been established by DummyPlatform.
74 class Blinker(Elaboratable
):
77 def elaborate(self
, platform
):
80 m
.d
.comb
+= count
.eq(5)
85 _trellis_command_templates = [
87 {{invoke_tool("yosys")}}
89 {{get_override("yosys_opts")|options}}
96 # sigh, have to create a dummy platform for now.
97 # TODO: investigate how the heck to get it to output ilang. or verilog.
98 # or, anything, really. but at least it doesn't barf
99 class DummyPlatform(TemplatedPlatform
):
103 command_templates
= ['/bin/true']
105 **TemplatedPlatform
.build_script_templates
,
110 "{{name}}.debug.v": r
"""
111 /* {{autogenerated}} */
112 {{emit_debug_verilog()}}
116 def __init__(self
, resources
):
117 self
.resources
= resources
121 and to create a Platform instance with that list, and build
125 p.resources=listofstuff
128 pinset
= dummy_pinset()
129 resources
= create_resources(pinset
)
132 p
= DummyPlatform (resources
)
133 p
.resources
= create_resources(pinset
)