+ self.lsi = lsikls(pspec)
+
+
+class ConfigMemoryPortInterface:
+ def __init__(self, pspec):
+ self.pspec = pspec
+ if pspec.ldst_ifacetype == 'testpi':
+ self.pi = TestMemoryPortInterface(addrwid=pspec.addr_wid, # adr bus
+ regwid=pspec.reg_wid) # data bus
+ return
+ self.lsmem = ConfigLoadStoreUnit(pspec)
+ self.pi = Pi2LSUI("mem", lsui=self.lsmem.lsi,
+ addr_wid=pspec.addr_wid, # address range