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set fetch_failed into PowerDecoder2 combinatorially
[soc.git]
/
src
/
soc
/
simple
/
issuer.py
diff --git
a/src/soc/simple/issuer.py
b/src/soc/simple/issuer.py
index 9c40e45d85bc9c8185499d7be0bbf4b0e20d096a..16646338187409489788f800bf3cadc2f95ffadc 100644
(file)
--- a/
src/soc/simple/issuer.py
+++ b/
src/soc/simple/issuer.py
@@
-702,8
+702,9
@@
class TestIssuerInternal(Elaboratable):
fetch_failed = core.icache.i_out.fetch_failed
else:
fetch_failed = Const(0, 1)
fetch_failed = core.icache.i_out.fetch_failed
else:
fetch_failed = Const(0, 1)
- # set to zero initially
- sync += pdecode2.instr_fault.eq(0)
+ # set to fault in decoder
+ # update (highest priority) instruction fault
+ comb += pdecode2.instr_fault.eq(fetch_failed)
with m.FSM(name="issue_fsm"):
with m.FSM(name="issue_fsm"):
@@
-859,9
+860,6
@@
class TestIssuerInternal(Elaboratable):
# allowing it to be set again during the next execution
sync += pdecode2.ldst_exc.eq(0)
# allowing it to be set again during the next execution
sync += pdecode2.ldst_exc.eq(0)
- # update (highest priority) instruction fault
- sync += pdecode2.instr_fault.eq(fetch_failed)
-
m.next = "INSN_EXECUTE" # move to "execute"
# handshake with execution FSM, move to "wait" once acknowledged
m.next = "INSN_EXECUTE" # move to "execute"
# handshake with execution FSM, move to "wait" once acknowledged