move main python code to src directory

[soc.git] / TLB / src / Makefile

diff --git a/TLB/src/Makefile b/TLB/src/Makefile
deleted file mode 100644 (file)
index 1eb67ac..0000000
--- a/TLB/src/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-verilog:
-       python3 Cam.py generate -t v > Cam.v