add in tlb_entries and asid_width parameters to constructors

[soc.git] / TLB / src / ariane / tlb_content.py

diff --git a/TLB/src/ariane/tlb_content.py b/TLB/src/ariane/tlb_content.py
index 8464ac80ba7cce640048419de4e98103cfecfb27..024c5697e1f96c77cea6058a9c2785a501c058cd 100644 (file)
--- a/TLB/src/ariane/tlb_content.py
+++ b/TLB/src/ariane/tlb_content.py
@@ -29,15 +29,15 @@ class TLBContent:
         self.pte_width = pte_width
         self.flush_i = Signal()  # Flush signal
         # Update TLB
-        self.update_i = TLBUpdate()
+        self.update_i = TLBUpdate(asid_width)
         self.vpn2 = Signal(9)
         self.vpn1 = Signal(9)
         self.vpn0 = Signal(9)
         self.replace_en_i = Signal() # replace the following entry,
                                      # set by replacement strategy
         # Lookup signals
-        self.lu_asid_i = Signal(self.asid_width)
-        self.lu_content_o = Signal(self.pte_width)
+        self.lu_asid_i = Signal(asid_width)
+        self.lu_content_o = Signal(pte_width)
         self.lu_is_2M_o = Signal()
         self.lu_is_1G_o = Signal()
         self.lu_hit_o = Signal()
@@ -122,4 +122,4 @@ class TLBContent:
         return [self.flush_i,
                  self.lu_asid_i,
                  self.lu_is_2M_o, self.lu_is_1G_o, self.lu_hit_o,
-                ] + self.update_i.content.ports() + self.update_i.ports()
\ No newline at end of file
+                ] + self.update_i.content.ports() + self.update_i.ports()