Adding Reset. Cleaning Logic for CAM. Still needs tests

[soc.git] / TLB / test / test_cam.py

diff --git a/TLB/test/test_cam.py b/TLB/test/test_cam.py
index c5141a932f53f4d7f5201859d0bab864562ddd56..2e05863408f59830066a2c932fa4dbb482ee0f15 100644 (file)
--- a/TLB/test/test_cam.py
+++ b/TLB/test/test_cam.py
@@ -79,7 +79,17 @@ def testbench(dut):
     data_hit = 1
     yield from set_cam(dut, command, address, key, data)
     yield
-    yield from check_all(dut, data_hit, data, 0, 0)     
+    yield from check_all(dut, data_hit, data, 0, 0)
+    
+    # Reset 
+    command = 4
+    address = 0
+    key = 0
+    data = 0
+    data_hit = 0
+    yield from set_cam(dut, command, address, key, data)
+    yield
+    yield from check_all(dut, data_hit, data, 0, 0)      
     
     yield