add extra gitignores

[soclayout.git] / examples / alu_hier.py

diff --git a/examples/alu_hier.py b/examples/alu_hier.py
index 4ae6ce48914034c0083ec54fc17db98007f37bf5..b42fb1d32bb58c89eaaac4d31c6bc6f9faa2f46e 100644 (file)
--- a/examples/alu_hier.py
+++ b/examples/alu_hier.py
@@ -37,7 +37,11 @@ class ALU(Elaboratable):
         self.sub = Subtractor(width)
 
     def elaborate(self, platform):
+
         m = Module()
+        #m.domains.sync = ClockDomain()
+        #m.d.comb += ClockSignal().eq(self.m_clock)
+
         m.submodules.add = self.add
         m.submodules.sub = self.sub
         m.d.comb += [
@@ -47,9 +51,9 @@ class ALU(Elaboratable):
             self.sub.b.eq(self.b),
         ]
         with m.If(self.op):
-            m.d.comb += self.o.eq(self.sub.o)
+            m.d.sync += self.o.eq(self.sub.o)
         with m.Else():
-            m.d.comb += self.o.eq(self.add.o)
+            m.d.sync += self.o.eq(self.add.o)
         return m
 
 
@@ -60,4 +64,5 @@ def create_ilang(dut, ports, test_name):
 
 if __name__ == "__main__":
     alu = ALU(width=16)
-    create_ilang(alu, [alu.op, alu.a, alu.b, alu.o], "alu_hier")
+    create_ilang(alu, [#alu.m_clock, alu.p_reset,
+                       alu.op, alu.a, alu.b, alu.o], "alu_hier")