replace i_valid with valid_i

[ieee754fpu.git] / src / add / fpadd / pipeline.py

diff --git a/src/add/fpadd/pipeline.py b/src/add/fpadd/pipeline.py
index 6917b67865b3789890220deff81e1d71d3ebe1da..5e116b9f6262612732e13120b332e5701dec005b 100644 (file)
--- a/src/add/fpadd/pipeline.py
+++ b/src/add/fpadd/pipeline.py
@@ -26,8 +26,6 @@ class FPADDBasePipe(ControlBase):
         self.pipe2 = FPAddAlignSingleAdd(width, id_wid)
         self.pipe3 = FPNormToPack(width, id_wid)
 
-        self._eqs = self.connect([self.pipe1, self.pipe2, self.pipe3])
-
     def elaborate(self, platform):
         m = Module()
         m.submodules.scnorm = self.pipe1