#m.submodules.add0_out_z = self.out_z
m.d.comb += self.out_z.e.eq(self.in_a.e)
+
+ # store intermediate tests (and zero-extended mantissas)
+ seq = Signal(reset_less=True)
+ mge = Signal(reset_less=True)
+ am0 = Signal(len(self.in_a.m)+1, reset_less=True)
+ bm0 = Signal(len(self.in_b.m)+1, reset_less=True)
+ m.d.comb += [seq.eq(self.in_a.s == self.in_b.s),
+ mge.eq(self.in_a.m >= self.in_b.m),
+ am0.eq(Cat(self.in_a.m, 0)),
+ bm0.eq(Cat(self.in_b.m, 0))
+ ]
# same-sign (both negative or both positive) add mantissas
- with m.If(self.in_a.s == self.in_b.s):
+ with m.If(seq):
m.d.comb += [
- self.out_tot.eq(Cat(self.in_a.m, 0) + Cat(self.in_b.m, 0)),
+ self.out_tot.eq(am0 + bm0),
self.out_z.s.eq(self.in_a.s)
]
# a mantissa greater than b, use a
- with m.Elif(self.in_a.m >= self.in_b.m):
+ with m.Elif(mge):
m.d.comb += [
- self.out_tot.eq(Cat(self.in_a.m, 0) - Cat(self.in_b.m, 0)),
+ self.out_tot.eq(am0 - bm0),
self.out_z.s.eq(self.in_a.s)
]
# b mantissa greater than a, use b
with m.Else():
m.d.comb += [
- self.out_tot.eq(Cat(self.in_b.m, 0) - Cat(self.in_a.m, 0)),
+ self.out_tot.eq(bm0 - am0),
self.out_z.s.eq(self.in_b.s)
]
return m
"""
m.d.comb += self.in_z.copy(in_z)
m.d.comb += self.in_tot.eq(in_tot)
- m.d.comb += out_z.copy(self.out_z)
- m.d.comb += out_of.copy(self.out_of)
+ #m.d.comb += out_z.copy(self.out_z)
+ #m.d.comb += out_of.copy(self.out_of)
def elaborate(self, platform):
m = Module()
self.out_of = Overflow()
def action(self, m):
- m.d.sync += self.of.copy(self.out_of)
- m.d.sync += self.z.copy(self.out_z)
+ m.submodules.add1_out_overflow = self.out_of
+ m.d.sync += self.out_of.copy(self.mod.out_of)
+ m.d.sync += self.out_z.copy(self.mod.out_z)
m.next = "normalise_1"
m.submodules.norm1_out_z = self.out_z
m.d.comb += self.out_z.copy(self.in_z)
m.d.comb += self.out_of.copy(self.in_of)
- m.d.comb += self.out_norm.eq((self.in_z.m_msbzero) & \
- (self.in_z.exp_gt_n126))
- with m.If(self.out_norm):
+ decrease = Signal(reset_less=True)
+ increase = Signal(reset_less=True)
+ m.d.comb += decrease.eq(self.in_z.m_msbzero & self.in_z.exp_gt_n126)
+ m.d.comb += increase.eq(self.in_z.exp_lt_n126)
+ m.d.comb += self.out_norm.eq(decrease | increase)
+ with m.If(decrease):
m.d.comb += [
self.out_z.e.eq(self.in_z.e - 1), # DECREASE exponent
self.out_z.m.eq(self.in_z.m << 1), # shift mantissa UP
self.out_of.round_bit.eq(0), # reset round bit
self.out_of.m0.eq(self.in_of.guard),
]
-
- return m
-
-
-class FPNorm1(FPState):
-
- def __init__(self, width):
- FPState.__init__(self, "normalise_1")
- self.mod = FPNorm1Mod(width)
- self.out_norm = Signal(reset_less=True)
- self.out_z = FPNumBase(width)
- self.out_of = Overflow()
-
- def action(self, m):
- m.d.sync += self.of.copy(self.out_of)
- m.d.sync += self.z.copy(self.out_z)
- with m.If(~self.out_norm):
- m.next = "normalise_2"
-
-
-class FPNorm2Mod:
-
- def __init__(self, width):
- self.out_norm = Signal(reset_less=True)
- self.in_z = FPNumBase(width, False)
- self.out_z = FPNumBase(width, False)
- self.in_of = Overflow()
- self.out_of = Overflow()
-
- def setup(self, m, in_z, out_z, in_of, out_of, out_norm):
- """ links module to inputs and outputs
- """
- m.d.comb += self.in_z.copy(in_z)
- m.d.comb += out_z.copy(self.out_z)
- m.d.comb += self.in_of.copy(in_of)
- m.d.comb += out_of.copy(self.out_of)
- m.d.comb += out_norm.eq(self.out_norm)
-
- def elaborate(self, platform):
- m = Module()
- m.submodules.norm2_in_overflow = self.in_of
- m.submodules.norm2_out_overflow = self.out_of
- m.submodules.norm2_in_z = self.in_z
- m.submodules.norm2_out_z = self.out_z
- m.d.comb += self.out_z.copy(self.in_z)
- m.d.comb += self.out_of.copy(self.in_of)
- m.d.comb += self.out_norm.eq(self.in_z.exp_lt_n126)
- with m.If(self.out_norm):
+ with m.If(increase):
m.d.comb += [
self.out_z.e.eq(self.in_z.e + 1), # INCREASE exponent
self.out_z.m.eq(self.in_z.m >> 1), # shift mantissa DOWN
return m
-class FPNorm2(FPState):
+class FPNorm1(FPState):
def __init__(self, width):
- FPState.__init__(self, "normalise_2")
- self.mod = FPNorm2Mod(width)
+ FPState.__init__(self, "normalise_1")
+ self.mod = FPNorm1Mod(width)
self.out_norm = Signal(reset_less=True)
self.out_z = FPNumBase(width)
self.out_of = Overflow()
def action(self, m):
- #m.d.sync += self.of.copy(self.out_of)
+ m.d.sync += self.of.copy(self.out_of)
m.d.sync += self.z.copy(self.out_z)
with m.If(~self.out_norm):
m.next = "round"
def action(self, m):
m.d.sync += self.z.v.eq(self.out_z.v)
- m.next = "put_z"
+ m.next = "pack_put_z"
class FPPutZ(FPState):
w = z.m_width + 4
- of = Overflow()
- m.submodules.overflow = of
-
geta = self.add_state(FPGetOp("get_a", "get_b",
self.in_a, self.width))
a = geta.out_op
alm.mod.setup(m, a, b, alm.out_a, alm.out_b, alm.exp_eq)
m.submodules.align = alm.mod
+ az1 = FPNumOut(self.width, False)
+ m.submodules.fpnum_az1 = az1
+
add0 = self.add_state(FPAddStage0(self.width))
add0.set_inputs({"a": alm.out_a, "b": alm.out_b})
- add0.set_outputs({"z": z})
- add0.mod.setup(m, alm.out_a, alm.out_b, z, add0.out_z, add0.out_tot)
+ add0.set_outputs({"z": az1})
+ add0.mod.setup(m, alm.out_a, alm.out_b, az1, add0.out_z, add0.out_tot)
m.submodules.add0 = add0.mod
add1 = self.add_state(FPAddStage1(self.width))
- add1.set_inputs({"tot": add0.out_tot, "z": add0.out_z})
- add1.set_outputs({"z": z, "of": of}) # XXX Z as output
- add1.mod.setup(m, add0.out_tot, z, add1.out_z, add1.out_of)
+ #add1.set_outputs({"z": az}) # XXX Z as output
+ add1.mod.setup(m, add0.out_tot, az1, None, add1.out_of)
m.submodules.add1 = add1.mod
+ az = add1.out_z
+
n1 = self.add_state(FPNorm1(self.width))
- n1.set_inputs({"z": z, "of": of}) # XXX Z as output
- n1.set_outputs({"z": z}) # XXX Z as output
- n1.mod.setup(m, z, n1.out_z, of, n1.out_of, n1.out_norm)
+ n1.set_inputs({"z": az, "of": add1.out_of}) # XXX Z as output
+ n1.set_outputs({"z": az}) # XXX Z as output
+ n1.mod.setup(m, az, n1.out_z, add1.out_of, n1.out_of, n1.out_norm)
m.submodules.normalise_1 = n1.mod
- n2 = self.add_state(FPNorm2(self.width))
- n2.set_inputs({"z": n1.out_z, "of": n1.out_of})
- n2.set_outputs({"z": z})
- n2.mod.setup(m, n1.out_z, n2.out_z, n1.out_of, n2.out_of, n2.out_norm)
- m.submodules.normalise_2 = n2.mod
+ rnz = FPNumOut(self.width, False)
+ m.submodules.fpnum_rnz = rnz
rn = self.add_state(FPRound(self.width))
- rn.set_inputs({"z": n2.out_z, "of": n2.out_of})
- rn.set_outputs({"z": z})
- rn.mod.setup(m, n2.out_z, rn.out_z, of)
+ rn.set_inputs({"of": n1.out_of})
+ rn.set_outputs({"z": rnz})
+ rn.mod.setup(m, n1.out_z, rn.out_z, add1.out_of)
m.submodules.roundz = rn.mod
cor = self.add_state(FPCorrections(self.width))
- cor.set_inputs({"z": z}) # XXX Z as output
- cor.set_outputs({"z": z}) # XXX Z as output
- cor.mod.setup(m, z, cor.out_z)
+ cor.set_inputs({"z": rnz}) # XXX Z as output
+ #cor.set_outputs({"z": rnz}) # XXX Z as output
+ cor.mod.setup(m, rnz, cor.out_z)
m.submodules.corrections = cor.mod
pa = self.add_state(FPPack(self.width))
- pa.set_inputs({"z": z}) # XXX Z as output
- pa.set_outputs({"z": z}) # XXX Z as output
- pa.mod.setup(m, z, pa.out_z)
+ pa.set_inputs({"z": cor.out_z}) # XXX Z as output
+ pa.set_outputs({"z": cor.out_z}) # XXX Z as output
+ pa.mod.setup(m, cor.out_z, pa.out_z)
m.submodules.pack = pa.mod
+ pz = self.add_state(FPPutZ("pack_put_z"))
+ pz.set_inputs({"z": cor.out_z})
+ pz.set_outputs({"out_z": self.out_z})
+
pz = self.add_state(FPPutZ("put_z"))
pz.set_inputs({"z": z})
pz.set_outputs({"out_z": self.out_z})
projects / ieee754fpu.git / blobdiff