use SimpleHandshake instead of UnbufferedPipeline

[ieee754fpu.git] / src / add / test_inout_mux_pipe.py

diff --git a/src/add/test_inout_mux_pipe.py b/src/add/test_inout_mux_pipe.py
index d0ff6489212935c2a3c2bab2fcb93cc19ff894cc..92b6f53f3b724ca73567b63c8ec9952cae97494c 100644 (file)
--- a/src/add/test_inout_mux_pipe.py
+++ b/src/add/test_inout_mux_pipe.py
@@ -13,7 +13,7 @@ from nmigen.cli import verilog, rtlil
 
 from multipipe import CombMultiOutPipeline, CombMuxOutPipe
 from multipipe import PriorityCombMuxInPipe
-from singlepipe import UnbufferedPipeline
+from singlepipe import SimpleHandshake
 
 
 class PassData: # (Value):
@@ -50,9 +50,9 @@ class PassThroughStage:
 
 
 
-class PassThroughPipe(UnbufferedPipeline):
+class PassThroughPipe(SimpleHandshake):
     def __init__(self):
-        UnbufferedPipeline.__init__(self, PassThroughStage())
+        SimpleHandshake.__init__(self, PassThroughStage())
 
 
 class InputTest: