pep8 cleanup

[pinmux.git] / src / bsv / actual_pinmux.py

diff --git a/src/bsv/actual_pinmux.py b/src/bsv/actual_pinmux.py
index 7156fd154af5d8edbadbfbcdad481f6e309568bf..1d1fcd405c4538238f7dfcd391dc213297ea47cc 100644 (file)
--- a/src/bsv/actual_pinmux.py
+++ b/src/bsv/actual_pinmux.py
@@ -55,6 +55,10 @@ def fmt(ifaces, cells, idx, suffix=None):
         multiple pads be switched simutaneously to outputs
         by setting the GPIO direction rather than having them
         set arbitrarily by changing the muxer registers.
+
+        The exception to this rule is when the muxer width is 1
+        (i.e. it is a dedicated line).  Then, a "1" is outputted
+        and the pin is PERMANENTly enabled as an output.
     """
     idx += 1
     if idx < len(cells):
@@ -69,6 +73,8 @@ def fmt(ifaces, cells, idx, suffix=None):
     if x == 'input':
         return 'val0'  # inputs don't get passed through to the out mux
     if suffix == '_outen' and x == 'out':
+        if len(cells) == 2:
+            return "val1"
         return "wr%s%s" % (cells[1], suffix or '')  # USE GPIO FOR SELECTION
     if x == 'out':  # sigh hack, should be using interface_decl
         suffix = ''
@@ -198,6 +204,7 @@ def init(p, ifaces):
         #print cell, temp, x
         dedcell(p, x, cell)
 
+
 def muxcell(p, cname, x, cell, i):
     if x == "input":
         p.pinmux += \
@@ -206,6 +213,8 @@ def muxcell(p, cname, x, cell, i):
         p.pinmux += \
             mux_wire.format(cell[0], i, "wr" + cname +
                                         "_in") + "\n"
+
+
 def dedcell(p, x, cell):
     if x == "input":
         p.pinmux += \