working on all cycles, RaW / WaR

[soc.git] / src / experiment / score6600.py

diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py
index cab033bee236b19bd4c857ad3f5e428d7f9d8a08..9e17b3f2a516e470b569b731b8937ac6e8b3bed5 100644 (file)
--- a/src/experiment/score6600.py
+++ b/src/experiment/score6600.py
@@ -417,8 +417,6 @@ def scoreboard_sim(dut, alusim):
             yield
         yield from print_reg(dut, [1,2,3])
         yield
-        yield
-        yield
 
     yield
     yield from print_reg(dut, [1,2,3])