Connect up pipeline stages

[ieee754fpu.git] / src / ieee754 / cordic / pipe_data.py

diff --git a/src/ieee754/cordic/pipe_data.py b/src/ieee754/cordic/pipe_data.py
index 2ed23d69a96a70d484795b61f3b3eeaaf9d2c0f2..6335244fbd098f5d68f8c6c74c08cb5b42706820 100644 (file)
--- a/src/ieee754/cordic/pipe_data.py
+++ b/src/ieee754/cordic/pipe_data.py
@@ -1,6 +1,17 @@
-from nmigen import Signal
+from nmigen import Signal, Const
 import math
 
+class CordicInitialData:
+
+    def __init__(self, pspec):
+        ZMAX = pspec.ZMAX
+        self.z0 = Signal(range(-ZMAX, ZMAX), name="z")     # denormed result
+
+    def __iter__(self):
+        yield from self.z
+
+    def eq(self, i):
+        return [self.z.eq(i.z)]
 
 class CordicData:
 
@@ -27,3 +38,5 @@ class CordicPipeSpec:
         self.fracbits = fracbits
         self.M = (1 << fracbits)
         self.ZMAX = int(round(self.M * math.pi/2))
+        zm = Const(-self.ZMAX)
+        self.iterations = zm.width - 1