move fpcommon to separate subdir

[ieee754fpu.git] / src / ieee754 / fpcommon / pack.py

diff --git a/src/ieee754/fpcommon/pack.py b/src/ieee754/fpcommon/pack.py
new file mode 100644 (file)
index 0000000..1464883
--- /dev/null
+++ b/src/ieee754/fpcommon/pack.py
@@ -0,0 +1,84 @@
+# IEEE Floating Point Adder (Single Precision)
+# Copyright (C) Jonathan P Dawson 2013
+# 2013-12-12
+
+from nmigen import Module, Signal, Elaboratable
+from nmigen.cli import main, verilog
+
+from fpbase import FPNumOut
+from fpbase import FPState
+from fpcommon.roundz import FPRoundData
+from singlepipe import Object
+
+
+class FPPackData(Object):
+
+    def __init__(self, width, id_wid):
+        Object.__init__(self)
+        self.z = Signal(width, reset_less=True)
+        self.mid = Signal(id_wid, reset_less=True)
+
+
+class FPPackMod(Elaboratable):
+
+    def __init__(self, width, id_wid):
+        self.width = width
+        self.id_wid = id_wid
+        self.i = self.ispec()
+        self.o = self.ospec()
+
+    def ispec(self):
+        return FPRoundData(self.width, self.id_wid)
+
+    def ospec(self):
+        return FPPackData(self.width, self.id_wid)
+
+    def process(self, i):
+        return self.o
+
+    def setup(self, m, in_z):
+        """ links module to inputs and outputs
+        """
+        m.submodules.pack = self
+        m.d.comb += self.i.eq(in_z)
+
+    def elaborate(self, platform):
+        m = Module()
+        z = FPNumOut(self.width, False)
+        m.submodules.pack_in_z = self.i.z
+        m.submodules.pack_out_z = z
+        m.d.comb += self.o.mid.eq(self.i.mid)
+        with m.If(~self.i.out_do_z):
+            with m.If(self.i.z.is_overflowed):
+                m.d.comb += z.inf(self.i.z.s)
+            with m.Else():
+                m.d.comb += z.create(self.i.z.s, self.i.z.e, self.i.z.m)
+        with m.Else():
+            m.d.comb += z.v.eq(self.i.oz)
+        m.d.comb += self.o.z.eq(z.v)
+        return m
+
+
+class FPPack(FPState):
+
+    def __init__(self, width, id_wid):
+        FPState.__init__(self, "pack")
+        self.mod = FPPackMod(width)
+        self.out_z = self.ospec()
+
+    def ispec(self):
+        return self.mod.ispec()
+
+    def ospec(self):
+        return self.mod.ospec()
+
+    def setup(self, m, in_z):
+        """ links module to inputs and outputs
+        """
+        self.mod.setup(m, in_z)
+
+        m.d.sync += self.out_z.v.eq(self.mod.out_z.v)
+        m.d.sync += self.out_z.mid.eq(self.mod.o.mid)
+
+    def action(self, m):
+        m.next = "pack_put_z"