use nmigen all() instead of invert-invert bool()

[ieee754fpu.git] / src / ieee754 / fpcommon / roundz.py

diff --git a/src/ieee754/fpcommon/roundz.py b/src/ieee754/fpcommon/roundz.py
index 88795fbe3adab2e4653547ac6d45a1cfd6937d2c..a11f42acfff89c2c55f75cb763c2662277825d88 100644 (file)
--- a/src/ieee754/fpcommon/roundz.py
+++ b/src/ieee754/fpcommon/roundz.py
@@ -47,7 +47,7 @@ class FPRoundMod(PipeModBase):
         im = self.i.z.m
         ie = self.i.z.e
         msb1s = Signal(reset_less=True)
-        comb += msb1s.eq(~(~self.i.z.m).bool())  # all 1s
+        comb += msb1s.eq(self.i.z.m.all())  # all 1s
         comb += self.o.z.m.eq(Mux(self.i.roundz, im+1, im))  # mantissa up
         comb += self.o.z.e.eq(Mux(msb1s & self.i.roundz, ie + 1, ie)) # exp up