fix up FPNumBase by creating a Record class (not derived from Elaboratable)

[ieee754fpu.git] / src / ieee754 / fpcommon / roundz.py

diff --git a/src/ieee754/fpcommon/roundz.py b/src/ieee754/fpcommon/roundz.py
index 7a8831ce33bd138f7814c142fe14e6ecc56f1d80..db4482b6d1d8331c65303ea3c3f6e94b9c2e94cf 100644 (file)
--- a/src/ieee754/fpcommon/roundz.py
+++ b/src/ieee754/fpcommon/roundz.py
@@ -5,7 +5,7 @@
 from nmigen import Module, Signal, Elaboratable
 from nmigen.cli import main, verilog
 
-from ieee754.fpcommon.fpbase import FPNumBase
+from ieee754.fpcommon.fpbase import FPNumBase, FPNumBaseRecord
 from ieee754.fpcommon.fpbase import FPState
 from .postnormalise import FPNorm1Data
 
@@ -13,7 +13,7 @@ from .postnormalise import FPNorm1Data
 class FPRoundData:
 
     def __init__(self, width, id_wid):
-        self.z = FPNumBase(width, False)
+        self.z = FPNumBaseRecord(width, False)
         self.out_do_z = Signal(reset_less=True)
         self.oz = Signal(width, reset_less=True)
         self.mid = Signal(id_wid, reset_less=True)
@@ -42,7 +42,6 @@ class FPRoundMod(Elaboratable):
 
     def setup(self, m, i):
         m.submodules.roundz = self
-        m.submodules.round_out_z = self.i.z
         m.d.comb += self.i.eq(i)
 
     def elaborate(self, platform):