rename fp div classes and submodule

[ieee754fpu.git] / src / ieee754 / fpdiv / div2.py

diff --git a/src/ieee754/fpdiv/div2.py b/src/ieee754/fpdiv/div2.py
index 6cb1f5b3d5d4968164ac0d1facddb93b9d4a4ebf..d21ab848e4bdff3ac1b1d4f2067a528c5d09a5ae 100644 (file)
--- a/src/ieee754/fpdiv/div2.py
+++ b/src/ieee754/fpdiv/div2.py
@@ -17,7 +17,7 @@ from ieee754.fpcommon.postcalc import FPPostCalcData
 from ieee754.div_rem_sqrt_rsqrt.div_pipe import DivPipeOutputData
 
 
-class FPDivStage2Mod(PipeModBase):
+class FPDivPostToFPFormat(PipeModBase):
     """ Last stage of div: preparation for normalisation.
 
         NOTE: this phase does NOT do ACTUAL DIV processing, it ONLY
@@ -25,7 +25,7 @@ class FPDivStage2Mod(PipeModBase):
     """
 
     def __init__(self, pspec):
-        super().__init__(pspec, "div1")
+        super().__init__(pspec, "post_to_fp_fmt")
 
     def ispec(self):
         return DivPipeOutputData(self.pspec)  # Q/Rem in...