config/setup/imports
[ieee754fpu.git] / src / ieee754 / fpdiv / divstages.py
index e3b31d0df17848f3fa63d5edca435f5411d1891f..112c9d8819bca3184d32d062fb5ae47f988184e4 100644 (file)
@@ -12,11 +12,15 @@ from nmutil.singlepipe import (StageChain, SimpleHandshake)
 from ieee754.fpcommon.fpbase import FPState
 from ieee754.fpcommon.denorm import FPSCData
 from ieee754.fpcommon.postcalc import FPAddStage1Data
+from ieee754.div_rem_sqrt_rsqrt.div_pipe import (DivPipeInterstageData,
+                                                 DivPipeSetupStage,
+                                                 DivPipeCalculateStage,
+                                                 DivPipeFinalStage,
+                                                )
 
 # TODO: write these
 from .div0 import FPDivStage0Mod
 from .div2 import FPDivStage2Mod
-from .div0 import FPDivStage0Data
 
 
 class FPDivStagesSetup(FPState, SimpleHandshake):
@@ -74,7 +78,7 @@ class FPDivStagesSetup(FPState, SimpleHandshake):
         m.next = "normalise_1"
 
 
-class FPDivStagesIntermediary(FPState, SimpleHandshake):
+class FPDivStagesIntermediate(FPState, SimpleHandshake):
 
     def __init__(self, pspec, n_stages, stage_offs):
         FPState.__init__(self, "divintermediate")
@@ -158,10 +162,10 @@ class FPDivStagesFinal(FPState, SimpleHandshake):
         # will add.
         for count in range(self.n_stages): # number of combinatorial stages
             idx = count + self.stage_offs
-            divstages.append(DivPipeCalculateStage(pspec, idx))
+            divstages.append(DivPipeCalculateStage(self.pspec, idx))
 
         # does the final conversion from intermediary to output data
-        divstages.append(DivPipeFinalStage(pspec))
+        divstages.append(DivPipeFinalStage(self.pspec))
 
         # does conversion from DivPipeOutputData into
         # FPAddStage1Data format (bad name, TODO, doesn't matter),