start implementing fp fused-mul-add pipeline

[ieee754fpu.git] / src / ieee754 / fpfma / util.py

diff --git a/src/ieee754/fpfma/util.py b/src/ieee754/fpfma/util.py
new file mode 100644 (file)
index 0000000..5372ab8
--- /dev/null
+++ b/src/ieee754/fpfma/util.py
@@ -0,0 +1,38 @@
+from ieee754.fpcommon.fpbase import FPFormat
+from nmigen.hdl.ast import signed, unsigned
+
+
+def expanded_exponent_shape(fpformat):
+    assert isinstance(fpformat, FPFormat)
+    return signed(fpformat.e_width + 3)
+
+
+EXPANDED_MANTISSA_EXTRA_LSBS = 3
+
+
+def expanded_mantissa_shape(fpformat):
+    assert isinstance(fpformat, FPFormat)
+    return signed(fpformat.fraction_width * 3 +
+                  2 + EXPANDED_MANTISSA_EXTRA_LSBS)
+
+
+def multiplicand_mantissa_shape(fpformat):
+    assert isinstance(fpformat, FPFormat)
+    return unsigned(fpformat.fraction_width + 1)
+
+
+def product_mantissa_shape(fpformat):
+    assert isinstance(fpformat, FPFormat)
+    return unsigned(multiplicand_mantissa_shape(fpformat).width * 2)
+
+
+def get_fpformat(pspec):
+    width = pspec.width
+    assert isinstance(width, int)
+    fpformat = getattr(pspec, "fpformat", None)
+    if fpformat is None:
+        fpformat = FPFormat.standard(width)
+    else:
+        assert isinstance(fpformat, FPFormat)
+    assert width == fpformat.width
+    return fpformat