"""
from ieee754.part_mul_add.adder import PartitionedAdder
-#from ieee754.part_cmp.equal_ortree import PartitionedEq
from ieee754.part_cmp.eq_gt_ge import PartitionedEqGtGe
+from ieee754.part_shift.part_shift_dynamic import PartitionedDynamicShift
+from ieee754.part_shift.part_shift_scalar import PartitionedScalarShift
from ieee754.part_mul_add.partpoints import make_partition
from operator import or_, xor, and_, not_
-from nmigen import (Signal,
- )
-def applyop(op1, op2, op):
+from nmigen import (Signal, Const)
+
+
+def getsig(op1):
if isinstance(op1, PartitionedSignal):
op1 = op1.sig
- if isinstance(op2, PartitionedSignal):
- op2 = op2.sig
- return op(op1, op2)
+ return op1
+
+
+def applyop(op1, op2, op):
+ return op(getsig(op1), getsig(op2))
class PartitionedSignal:
def __init__(self, mask, *args, **kwargs):
self.sig = Signal(*args, **kwargs)
- width = self.sig.shape()[0] # get signal width
- self.partpoints = make_partition(mask, width) # create partition points
+ width = self.sig.shape()[0] # get signal width
+ # create partition points
+ self.partpoints = make_partition(mask, width)
self.modnames = {}
- for name in ['add', 'eq', 'gt', 'ge']:
+ for name in ['add', 'eq', 'gt', 'ge', 'ls']:
self.modnames[name] = 0
def set_module(self, m):
def get_modname(self, category):
self.modnames[category] += 1
- return "%s%d" % (category, self.modnames[category])
+ return "%s_%d" % (category, self.modnames[category])
def eq(self, val):
- if isinstance(val, PartitionedSignal):
- return self.sig.eq(val.sig)
- return self.sig.eq(val)
+ return self.sig.eq(getsig(val))
# unary ops that do not require partitioning
# unary ops that require partitioning
def __neg__(self):
- # TODO use PartitionedAdder for this, with a "neg" mode?
- return Operator("-", [self])
+ z = Const(0, self.sig.shape())
+ result, _ = self.add_op(self, ~0, carry=z) # TODO, subop
+ return result
# binary ops that don't require partitioning
# binary ops that need partitioning
- def __add__(self, other):
- shape = self.sig.shape()
+ # TODO: detect if the 2nd operand is a Const, a Signal or a
+ # PartitionedSignal. if it's a Const or a Signal, a global shift
+ # can occur. if it's a PartitionedSignal, that's much more interesting.
+ def ls_op(self, op1, op2, carry):
+ op1 = getsig(op1)
+ if isinstance(op2, Const) or isinstance(op2, Signal):
+ scalar = True
+ shape = op1.shape()
+ pa = PartitionedScalarShift(shape[0], self.partpoints)
+ else:
+ scalar = False
+ op2 = getsig(op2)
+ shape = op1.shape()
+ pa = PartitionedDynamicShift(shape[0], self.partpoints)
+ setattr(self.m.submodules, self.get_modname('ls'), pa)
+ comb = self.m.d.comb
+ if scalar:
+ comb += pa.data.eq(op1)
+ comb += pa.shifter.eq(op2)
+ else:
+ comb += pa.a.eq(op1)
+ comb += pa.b.eq(op2)
+ # XXX TODO: carry-in, carry-out
+ #comb += pa.carry_in.eq(carry)
+ return (pa.output, 0)
+
+ def __lshift__(self, other):
+ result, _ = self.ls_op(self, other, carry=0)
+ return result
+
+ def __rlshift__(self, other):
+ raise NotImplementedError
+ return Operator("<<", [other, self])
+
+ def __rshift__(self, other):
+ raise NotImplementedError
+ return Operator(">>", [self, other])
+
+ def __rrshift__(self, other):
+ raise NotImplementedError
+ return Operator(">>", [other, self])
+
+ def add_op(self, op1, op2, carry):
+ op1 = getsig(op1)
+ op2 = getsig(op2)
+ shape = op1.shape()
pa = PartitionedAdder(shape[0], self.partpoints)
setattr(self.m.submodules, self.get_modname('add'), pa)
comb = self.m.d.comb
- comb += pa.a.eq(self.sig)
- if isinstance(other, PartitionedSignal):
- comb += pa.b.eq(other.sig)
- else:
- comb += pa.b.eq(other)
- return pa.output
+ comb += pa.a.eq(op1)
+ comb += pa.b.eq(op2)
+ comb += pa.carry_in.eq(carry)
+ return (pa.output, pa.carry_out)
+
+ def sub_op(self, op1, op2, carry=~0):
+ op1 = getsig(op1)
+ op2 = getsig(op2)
+ shape = op1.shape()
+ pa = PartitionedAdder(shape[0], self.partpoints)
+ setattr(self.m.submodules, self.get_modname('add'), pa)
+ comb = self.m.d.comb
+ comb += pa.a.eq(op1)
+ comb += pa.b.eq(~op2)
+ comb += pa.carry_in.eq(carry)
+ return (pa.output, pa.carry_out)
+
+ def __add__(self, other):
+ result, _ = self.add_op(self, other, carry=0)
+ return result
def __radd__(self, other):
- return Operator("+", [other, self])
+ result, _ = self.add_op(other, self)
+ return result
+
def __sub__(self, other):
- return Operator("-", [self, other])
+ result, _ = self.sub_op(self, other)
+ return result
+
def __rsub__(self, other):
- return Operator("-", [other, self])
+ result, _ = self.sub_op(other, self)
+ return result
def __mul__(self, other):
return Operator("*", [self, other])
+
def __rmul__(self, other):
return Operator("*", [other, self])
# completely by prohibiting such division operations.
raise NotImplementedError(
"Division by a signed value is not supported")
+
def __mod__(self, other):
+ raise NotImplementedError
other = Value.cast(other)
other.__check_divisor()
return Operator("%", [self, other])
+
def __rmod__(self, other):
+ raise NotImplementedError
self.__check_divisor()
return Operator("%", [other, self])
+
def __floordiv__(self, other):
+ raise NotImplementedError
other = Value.cast(other)
other.__check_divisor()
return Operator("//", [self, other])
+
def __rfloordiv__(self, other):
+ raise NotImplementedError
self.__check_divisor()
return Operator("//", [other, self])
- def __lshift__(self, other):
- return Operator("<<", [self, other])
- def __rlshift__(self, other):
- return Operator("<<", [other, self])
- def __rshift__(self, other):
- return Operator(">>", [self, other])
-
# binary comparison ops that need partitioning
def _compare(self, width, op1, op2, opname, optype):
- #print (opname, op1, op2)
+ # print (opname, op1, op2)
pa = PartitionedEqGtGe(width, self.partpoints)
setattr(self.m.submodules, self.get_modname(opname), pa)
comb = self.m.d.comb
- comb += pa.opcode.eq(optype) # set opcode
+ comb += pa.opcode.eq(optype) # set opcode
if isinstance(op1, PartitionedSignal):
comb += pa.a.eq(op1.sig)
else:
Value, out
``1`` if any bits are set, ``0`` otherwise.
"""
+ raise NotImplementedError
return Operator("b", [self])
def any(self):
Value, out
``1`` if any bits are set, ``0`` otherwise.
"""
+ raise NotImplementedError
return Operator("r|", [self])
def all(self):
Value, out
``1`` if all bits are set, ``0`` otherwise.
"""
+ raise NotImplementedError
return Operator("r&", [self])
def xor(self):
``1`` if an odd number of bits are set, ``0`` if an
even number of bits are set.
"""
+ # XXXX TODO: return partition-mask-sized set of bits
+ raise NotImplementedError
return Operator("r^", [self])
def implies(premise, conclusion):
``0`` if ``premise`` is true and ``conclusion`` is not,
``1`` otherwise.
"""
+ # amazingly, this should actually work.
return ~premise | conclusion
-
-
projects / ieee754fpu.git / blobdiff