had to add fixed_width parameter temporarily to confirm that the

[ieee754fpu.git] / src / ieee754 / part / partsig.py

diff --git a/src/ieee754/part/partsig.py b/src/ieee754/part/partsig.py
index 26e526aca2a6a695f91256d860f9ed18f178e7e9..61b64e661e4ff1a3e3b2d8e3896c18be923947eb 100644 (file)
--- a/src/ieee754/part/partsig.py
+++ b/src/ieee754/part/partsig.py
@@ -144,7 +144,8 @@ class SimdSignal(UserValue):
     # XXX ################################################### XXX
     # XXX Keep these functions in the same order as ast.Value XXX
     # XXX ################################################### XXX
-    def __init__(self, mask, shape=None, *args, src_loc_at=0, **kwargs):
+    def __init__(self, mask, shape=None, *args,
+                       src_loc_at=0, fixed_width=None, **kwargs):
         super().__init__(src_loc_at=src_loc_at)
         print ("SimdSignal shape", shape)
         # create partition points
@@ -153,7 +154,7 @@ class SimdSignal(UserValue):
             self.ptype = ElwidPartType(self)
             # adapt shape to a SimdShape
             if not isinstance(shape, SimdShape):
-                shape = SimdShape(self.scope, shape)
+                shape = SimdShape(self.scope, shape, fixed_width=fixed_width)
             self._shape = shape
             self.sig = Signal(shape, *args, **kwargs)
             # get partpoints from SimdShape